Dilanthi 02e2d77640 header for rom_sd.sv

2025-06-04 14:34:49 -07:00

.woodpecker

Add a wowrkflow to test that everything works

2025-05-07 17:40:55 -07:00

design

header for rom_sd.sv

2025-06-04 14:34:49 -07:00

doc

Fixup on rom_sd flowchart

2025-06-03 22:36:01 -07:00

lib

Initial work on rom_sd

2025-06-02 14:02:50 -07:00

roms

Initial work on rom_sd

2025-06-02 14:02:50 -07:00

verification

added headers/ updated old ones

2025-06-02 17:36:27 -07:00

.gitignore

Add vivado project

2025-05-16 17:16:08 -07:00

Nexys-A7-100T-Master.xdc

Fixup to get main demo working

2025-05-26 22:52:14 -07:00

SDVD.xpr

Fixed up debouncer and added some assertions

2025-05-30 13:56:52 -07:00

S

Description

An FPGA video player

353 MiB

Languages

SystemVerilog 73.3%

Tcl 26.6%

Python 0.1%