Add verification section to design.pdf

Update design doc
Add design document
2025-06-12 20:20:06 -07:00 · 2025-06-12 20:07:05 -07:00 · 2025-06-11 22:50:03 -07:00 · 2025-06-10 14:27:39 -07:00 · 2025-06-10 20:40:39 +00:00 · 2025-06-10 13:32:14 -07:00
37 changed files with 1421 additions and 357 deletions
@@ -217,29 +217,6 @@ set_property -dict {PACKAGE_PIN D12 IOSTANDARD LVCMOS33} [get_ports AUD_SD]
 #set_property -dict { PACKAGE_PIN L13   IOSTANDARD LVCMOS33 } [get_ports { QSPI_CSN }]; #IO_L6P_T0_FCS_B_14 Sch=qspi_csn
 connect_debug_port u_ila_0/probe2 [get_nets [list {realSdPlayer/address[0]} {realSdPlayer/address[1]} {realSdPlayer/address[2]} {realSdPlayer/address[3]} {realSdPlayer/address[4]} {realSdPlayer/address[5]} {realSdPlayer/address[6]} {realSdPlayer/address[7]} {realSdPlayer/address[8]} {realSdPlayer/address[9]} {realSdPlayer/address[10]} {realSdPlayer/address[11]} {realSdPlayer/address[12]} {realSdPlayer/address[13]} {realSdPlayer/address[14]} {realSdPlayer/address[15]} {realSdPlayer/address[16]} {realSdPlayer/address[17]} {realSdPlayer/address[18]} {realSdPlayer/address[19]} {realSdPlayer/address[20]} {realSdPlayer/address[21]} {realSdPlayer/address[22]} {realSdPlayer/address[23]} {realSdPlayer/address[24]} {realSdPlayer/address[25]} {realSdPlayer/address[26]} {realSdPlayer/address[27]} {realSdPlayer/address[28]} {realSdPlayer/address[29]} {realSdPlayer/address[30]} {realSdPlayer/address[31]}]]
 set_property MARK_DEBUG true [get_nets reset]
 connect_debug_port u_ila_0/probe4 [get_nets [list {realSdPlayer/reader/next_state[0]} {realSdPlayer/reader/next_state[1]} {realSdPlayer/reader/next_state[2]}]]
 connect_debug_port u_ila_0/probe7 [get_nets [list {realSdPlayer/reader/state[0]} {realSdPlayer/reader/state[1]} {realSdPlayer/reader/state[2]}]]
 connect_debug_port u_ila_0/probe6 [get_nets [list {realSdPlayer/sender/to_send[0]} {realSdPlayer/sender/to_send[1]} {realSdPlayer/sender/to_send[2]} {realSdPlayer/sender/to_send[3]} {realSdPlayer/sender/to_send[4]} {realSdPlayer/sender/to_send[5]} {realSdPlayer/sender/to_send[6]} {realSdPlayer/sender/to_send[7]} {realSdPlayer/sender/to_send[8]} {realSdPlayer/sender/to_send[9]} {realSdPlayer/sender/to_send[10]} {realSdPlayer/sender/to_send[11]} {realSdPlayer/sender/to_send[12]} {realSdPlayer/sender/to_send[13]} {realSdPlayer/sender/to_send[14]} {realSdPlayer/sender/to_send[15]} {realSdPlayer/sender/to_send[16]} {realSdPlayer/sender/to_send[17]} {realSdPlayer/sender/to_send[18]} {realSdPlayer/sender/to_send[19]} {realSdPlayer/sender/to_send[20]} {realSdPlayer/sender/to_send[21]} {realSdPlayer/sender/to_send[22]} {realSdPlayer/sender/to_send[23]} {realSdPlayer/sender/to_send[24]} {realSdPlayer/sender/to_send[25]} {realSdPlayer/sender/to_send[26]} {realSdPlayer/sender/to_send[27]} {realSdPlayer/sender/to_send[28]} {realSdPlayer/sender/to_send[29]} {realSdPlayer/sender/to_send[30]} {realSdPlayer/sender/to_send[31]} {realSdPlayer/sender/to_send[32]} {realSdPlayer/sender/to_send[33]} {realSdPlayer/sender/to_send[34]} {realSdPlayer/sender/to_send[35]} {realSdPlayer/sender/to_send[36]} {realSdPlayer/sender/to_send[37]} {realSdPlayer/sender/to_send[38]} {realSdPlayer/sender/to_send[39]} {realSdPlayer/sender/to_send[40]} {realSdPlayer/sender/to_send[41]} {realSdPlayer/sender/to_send[42]} {realSdPlayer/sender/to_send[43]} {realSdPlayer/sender/to_send[44]} {realSdPlayer/sender/to_send[45]} {realSdPlayer/sender/to_send[46]} {realSdPlayer/sender/to_send[47]}]]
 set_property MARK_DEBUG true [get_nets realSdPlayer/fast_clk]
 connect_debug_port u_ila_0/probe8 [get_nets [list {realSdPlayer/fastSender/to_send[0]} {realSdPlayer/fastSender/to_send[1]} {realSdPlayer/fastSender/to_send[2]} {realSdPlayer/fastSender/to_send[3]} {realSdPlayer/fastSender/to_send[4]} {realSdPlayer/fastSender/to_send[5]} {realSdPlayer/fastSender/to_send[6]} {realSdPlayer/fastSender/to_send[7]} {realSdPlayer/fastSender/to_send[8]} {realSdPlayer/fastSender/to_send[9]} {realSdPlayer/fastSender/to_send[10]} {realSdPlayer/fastSender/to_send[11]} {realSdPlayer/fastSender/to_send[12]} {realSdPlayer/fastSender/to_send[13]} {realSdPlayer/fastSender/to_send[14]} {realSdPlayer/fastSender/to_send[15]} {realSdPlayer/fastSender/to_send[16]} {realSdPlayer/fastSender/to_send[17]} {realSdPlayer/fastSender/to_send[18]} {realSdPlayer/fastSender/to_send[19]} {realSdPlayer/fastSender/to_send[20]} {realSdPlayer/fastSender/to_send[21]} {realSdPlayer/fastSender/to_send[22]} {realSdPlayer/fastSender/to_send[23]} {realSdPlayer/fastSender/to_send[24]} {realSdPlayer/fastSender/to_send[25]} {realSdPlayer/fastSender/to_send[26]} {realSdPlayer/fastSender/to_send[27]} {realSdPlayer/fastSender/to_send[28]} {realSdPlayer/fastSender/to_send[29]} {realSdPlayer/fastSender/to_send[30]} {realSdPlayer/fastSender/to_send[31]} {realSdPlayer/fastSender/to_send[32]} {realSdPlayer/fastSender/to_send[33]} {realSdPlayer/fastSender/to_send[34]} {realSdPlayer/fastSender/to_send[35]} {realSdPlayer/fastSender/to_send[36]} {realSdPlayer/fastSender/to_send[37]} {realSdPlayer/fastSender/to_send[38]} {realSdPlayer/fastSender/to_send[39]} {realSdPlayer/fastSender/to_send[40]} {realSdPlayer/fastSender/to_send[41]} {realSdPlayer/fastSender/to_send[42]} {realSdPlayer/fastSender/to_send[43]} {realSdPlayer/fastSender/to_send[44]} {realSdPlayer/fastSender/to_send[45]} {realSdPlayer/fastSender/to_send[46]} {realSdPlayer/fastSender/to_send[47]}]]
 connect_debug_port u_ila_0/probe19 [get_nets [list realSdPlayer/send_command_ready_fast]]
 connect_debug_port u_ila_0/probe21 [get_nets [list realSdPlayer/send_command_start_fast]]
 set_property MARK_DEBUG true [get_nets realSdPlayer/sd_cmd_OBUF]
 create_debug_core u_ila_0 ila
 set_property ALL_PROBE_SAME_MU true [get_debug_cores u_ila_0]
 set_property ALL_PROBE_SAME_MU_CNT 2 [get_debug_cores u_ila_0]
@@ -252,92 +229,60 @@ set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
 set_property port_width 1 [get_debug_ports u_ila_0/clk]
 connect_debug_port u_ila_0/clk [get_nets [list CLK100MHZ_IBUF_BUFG]]
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe0]
-set_property port_width 6 [get_debug_ports u_ila_0/probe0]
+set_property port_width 48 [get_debug_ports u_ila_0/probe0]
-connect_debug_port u_ila_0/probe0 [get_nets [list {realSdPlayer/next_state[0]} {realSdPlayer/next_state[1]} {realSdPlayer/next_state[2]} {realSdPlayer/next_state[3]} {realSdPlayer/next_state[4]} {realSdPlayer/next_state[5]}]]
+connect_debug_port u_ila_0/probe0 [get_nets [list {realSdPlayer/slowSender/to_send[0]} {realSdPlayer/slowSender/to_send[1]} {realSdPlayer/slowSender/to_send[2]} {realSdPlayer/slowSender/to_send[3]} {realSdPlayer/slowSender/to_send[4]} {realSdPlayer/slowSender/to_send[5]} {realSdPlayer/slowSender/to_send[6]} {realSdPlayer/slowSender/to_send[7]} {realSdPlayer/slowSender/to_send[8]} {realSdPlayer/slowSender/to_send[9]} {realSdPlayer/slowSender/to_send[10]} {realSdPlayer/slowSender/to_send[11]} {realSdPlayer/slowSender/to_send[12]} {realSdPlayer/slowSender/to_send[13]} {realSdPlayer/slowSender/to_send[14]} {realSdPlayer/slowSender/to_send[15]} {realSdPlayer/slowSender/to_send[16]} {realSdPlayer/slowSender/to_send[17]} {realSdPlayer/slowSender/to_send[18]} {realSdPlayer/slowSender/to_send[19]} {realSdPlayer/slowSender/to_send[20]} {realSdPlayer/slowSender/to_send[21]} {realSdPlayer/slowSender/to_send[22]} {realSdPlayer/slowSender/to_send[23]} {realSdPlayer/slowSender/to_send[24]} {realSdPlayer/slowSender/to_send[25]} {realSdPlayer/slowSender/to_send[26]} {realSdPlayer/slowSender/to_send[27]} {realSdPlayer/slowSender/to_send[28]} {realSdPlayer/slowSender/to_send[29]} {realSdPlayer/slowSender/to_send[30]} {realSdPlayer/slowSender/to_send[31]} {realSdPlayer/slowSender/to_send[32]} {realSdPlayer/slowSender/to_send[33]} {realSdPlayer/slowSender/to_send[34]} {realSdPlayer/slowSender/to_send[35]} {realSdPlayer/slowSender/to_send[36]} {realSdPlayer/slowSender/to_send[37]} {realSdPlayer/slowSender/to_send[38]} {realSdPlayer/slowSender/to_send[39]} {realSdPlayer/slowSender/to_send[40]} {realSdPlayer/slowSender/to_send[41]} {realSdPlayer/slowSender/to_send[42]} {realSdPlayer/slowSender/to_send[43]} {realSdPlayer/slowSender/to_send[44]} {realSdPlayer/slowSender/to_send[45]} {realSdPlayer/slowSender/to_send[46]} {realSdPlayer/slowSender/to_send[47]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe1]
-set_property port_width 6 [get_debug_ports u_ila_0/probe1]
+set_property port_width 48 [get_debug_ports u_ila_0/probe1]
-connect_debug_port u_ila_0/probe1 [get_nets [list {realSdPlayer/state[0]} {realSdPlayer/state[1]} {realSdPlayer/state[2]} {realSdPlayer/state[3]} {realSdPlayer/state[4]} {realSdPlayer/state[5]}]]
+connect_debug_port u_ila_0/probe1 [get_nets [list {realSdPlayer/received_data[0]} {realSdPlayer/received_data[1]} {realSdPlayer/received_data[2]} {realSdPlayer/received_data[3]} {realSdPlayer/received_data[4]} {realSdPlayer/received_data[5]} {realSdPlayer/received_data[6]} {realSdPlayer/received_data[7]} {realSdPlayer/received_data[8]} {realSdPlayer/received_data[9]} {realSdPlayer/received_data[10]} {realSdPlayer/received_data[11]} {realSdPlayer/received_data[12]} {realSdPlayer/received_data[13]} {realSdPlayer/received_data[14]} {realSdPlayer/received_data[15]} {realSdPlayer/received_data[16]} {realSdPlayer/received_data[17]} {realSdPlayer/received_data[18]} {realSdPlayer/received_data[19]} {realSdPlayer/received_data[20]} {realSdPlayer/received_data[21]} {realSdPlayer/received_data[22]} {realSdPlayer/received_data[23]} {realSdPlayer/received_data[24]} {realSdPlayer/received_data[25]} {realSdPlayer/received_data[26]} {realSdPlayer/received_data[27]} {realSdPlayer/received_data[28]} {realSdPlayer/received_data[29]} {realSdPlayer/received_data[30]} {realSdPlayer/received_data[31]} {realSdPlayer/received_data[32]} {realSdPlayer/received_data[33]} {realSdPlayer/received_data[34]} {realSdPlayer/received_data[35]} {realSdPlayer/received_data[36]} {realSdPlayer/received_data[37]} {realSdPlayer/received_data[38]} {realSdPlayer/received_data[39]} {realSdPlayer/received_data[40]} {realSdPlayer/received_data[41]} {realSdPlayer/received_data[42]} {realSdPlayer/received_data[43]} {realSdPlayer/received_data[44]} {realSdPlayer/received_data[45]} {realSdPlayer/received_data[46]} {realSdPlayer/received_data[47]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe2]
-set_property port_width 11 [get_debug_ports u_ila_0/probe2]
+set_property port_width 4 [get_debug_ports u_ila_0/probe2]
-connect_debug_port u_ila_0/probe2 [get_nets [list {realSdPlayer/dataHandler/buffer\\.addra[0]} {realSdPlayer/dataHandler/buffer\\.addra[1]} {realSdPlayer/dataHandler/buffer\\.addra[2]} {realSdPlayer/dataHandler/buffer\\.addra[3]} {realSdPlayer/dataHandler/buffer\\.addra[4]} {realSdPlayer/dataHandler/buffer\\.addra[5]} {realSdPlayer/dataHandler/buffer\\.addra[6]} {realSdPlayer/dataHandler/buffer\\.addra[7]} {realSdPlayer/dataHandler/buffer\\.addra[8]} {realSdPlayer/dataHandler/buffer\\.addra[9]} {realSdPlayer/dataHandler/buffer\\.addra[10]}]]
+connect_debug_port u_ila_0/probe2 [get_nets [list {realSdPlayer/sd_data[0]} {realSdPlayer/sd_data[1]} {realSdPlayer/sd_data[2]} {realSdPlayer/sd_data[3]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe3]
-set_property port_width 32 [get_debug_ports u_ila_0/probe3]
+set_property port_width 6 [get_debug_ports u_ila_0/probe3]
-connect_debug_port u_ila_0/probe3 [get_nets [list {realSdPlayer/arg[0]} {realSdPlayer/arg[1]} {realSdPlayer/arg[2]} {realSdPlayer/arg[3]} {realSdPlayer/arg[4]} {realSdPlayer/arg[5]} {realSdPlayer/arg[6]} {realSdPlayer/arg[7]} {realSdPlayer/arg[8]} {realSdPlayer/arg[9]} {realSdPlayer/arg[10]} {realSdPlayer/arg[11]} {realSdPlayer/arg[12]} {realSdPlayer/arg[13]} {realSdPlayer/arg[14]} {realSdPlayer/arg[15]} {realSdPlayer/arg[16]} {realSdPlayer/arg[17]} {realSdPlayer/arg[18]} {realSdPlayer/arg[19]} {realSdPlayer/arg[20]} {realSdPlayer/arg[21]} {realSdPlayer/arg[22]} {realSdPlayer/arg[23]} {realSdPlayer/arg[24]} {realSdPlayer/arg[25]} {realSdPlayer/arg[26]} {realSdPlayer/arg[27]} {realSdPlayer/arg[28]} {realSdPlayer/arg[29]} {realSdPlayer/arg[30]} {realSdPlayer/arg[31]}]]
+connect_debug_port u_ila_0/probe3 [get_nets [list {realSdPlayer/cmd[0]} {realSdPlayer/cmd[1]} {realSdPlayer/cmd[2]} {realSdPlayer/cmd[3]} {realSdPlayer/cmd[4]} {realSdPlayer/cmd[5]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe4]
-set_property port_width 48 [get_debug_ports u_ila_0/probe4]
+set_property port_width 16 [get_debug_ports u_ila_0/probe4]
-connect_debug_port u_ila_0/probe4 [get_nets [list {realSdPlayer/received_data[0]} {realSdPlayer/received_data[1]} {realSdPlayer/received_data[2]} {realSdPlayer/received_data[3]} {realSdPlayer/received_data[4]} {realSdPlayer/received_data[5]} {realSdPlayer/received_data[6]} {realSdPlayer/received_data[7]} {realSdPlayer/received_data[8]} {realSdPlayer/received_data[9]} {realSdPlayer/received_data[10]} {realSdPlayer/received_data[11]} {realSdPlayer/received_data[12]} {realSdPlayer/received_data[13]} {realSdPlayer/received_data[14]} {realSdPlayer/received_data[15]} {realSdPlayer/received_data[16]} {realSdPlayer/received_data[17]} {realSdPlayer/received_data[18]} {realSdPlayer/received_data[19]} {realSdPlayer/received_data[20]} {realSdPlayer/received_data[21]} {realSdPlayer/received_data[22]} {realSdPlayer/received_data[23]} {realSdPlayer/received_data[24]} {realSdPlayer/received_data[25]} {realSdPlayer/received_data[26]} {realSdPlayer/received_data[27]} {realSdPlayer/received_data[28]} {realSdPlayer/received_data[29]} {realSdPlayer/received_data[30]} {realSdPlayer/received_data[31]} {realSdPlayer/received_data[32]} {realSdPlayer/received_data[33]} {realSdPlayer/received_data[34]} {realSdPlayer/received_data[35]} {realSdPlayer/received_data[36]} {realSdPlayer/received_data[37]} {realSdPlayer/received_data[38]} {realSdPlayer/received_data[39]} {realSdPlayer/received_data[40]} {realSdPlayer/received_data[41]} {realSdPlayer/received_data[42]} {realSdPlayer/received_data[43]} {realSdPlayer/received_data[44]} {realSdPlayer/received_data[45]} {realSdPlayer/received_data[46]} {realSdPlayer/received_data[47]}]]
+connect_debug_port u_ila_0/probe4 [get_nets [list {audioOutput/sample_buffer[0]} {audioOutput/sample_buffer[1]} {audioOutput/sample_buffer[2]} {audioOutput/sample_buffer[3]} {audioOutput/sample_buffer[4]} {audioOutput/sample_buffer[5]} {audioOutput/sample_buffer[6]} {audioOutput/sample_buffer[7]} {audioOutput/sample_buffer[8]} {audioOutput/sample_buffer[9]} {audioOutput/sample_buffer[10]} {audioOutput/sample_buffer[11]} {audioOutput/sample_buffer[12]} {audioOutput/sample_buffer[13]} {audioOutput/sample_buffer[14]} {audioOutput/sample_buffer[15]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe5]
-set_property port_width 48 [get_debug_ports u_ila_0/probe5]
+set_property port_width 10 [get_debug_ports u_ila_0/probe5]
-connect_debug_port u_ila_0/probe5 [get_nets [list {realSdPlayer/slowSender/to_send[0]} {realSdPlayer/slowSender/to_send[1]} {realSdPlayer/slowSender/to_send[2]} {realSdPlayer/slowSender/to_send[3]} {realSdPlayer/slowSender/to_send[4]} {realSdPlayer/slowSender/to_send[5]} {realSdPlayer/slowSender/to_send[6]} {realSdPlayer/slowSender/to_send[7]} {realSdPlayer/slowSender/to_send[8]} {realSdPlayer/slowSender/to_send[9]} {realSdPlayer/slowSender/to_send[10]} {realSdPlayer/slowSender/to_send[11]} {realSdPlayer/slowSender/to_send[12]} {realSdPlayer/slowSender/to_send[13]} {realSdPlayer/slowSender/to_send[14]} {realSdPlayer/slowSender/to_send[15]} {realSdPlayer/slowSender/to_send[16]} {realSdPlayer/slowSender/to_send[17]} {realSdPlayer/slowSender/to_send[18]} {realSdPlayer/slowSender/to_send[19]} {realSdPlayer/slowSender/to_send[20]} {realSdPlayer/slowSender/to_send[21]} {realSdPlayer/slowSender/to_send[22]} {realSdPlayer/slowSender/to_send[23]} {realSdPlayer/slowSender/to_send[24]} {realSdPlayer/slowSender/to_send[25]} {realSdPlayer/slowSender/to_send[26]} {realSdPlayer/slowSender/to_send[27]} {realSdPlayer/slowSender/to_send[28]} {realSdPlayer/slowSender/to_send[29]} {realSdPlayer/slowSender/to_send[30]} {realSdPlayer/slowSender/to_send[31]} {realSdPlayer/slowSender/to_send[32]} {realSdPlayer/slowSender/to_send[33]} {realSdPlayer/slowSender/to_send[34]} {realSdPlayer/slowSender/to_send[35]} {realSdPlayer/slowSender/to_send[36]} {realSdPlayer/slowSender/to_send[37]} {realSdPlayer/slowSender/to_send[38]} {realSdPlayer/slowSender/to_send[39]} {realSdPlayer/slowSender/to_send[40]} {realSdPlayer/slowSender/to_send[41]} {realSdPlayer/slowSender/to_send[42]} {realSdPlayer/slowSender/to_send[43]} {realSdPlayer/slowSender/to_send[44]} {realSdPlayer/slowSender/to_send[45]} {realSdPlayer/slowSender/to_send[46]} {realSdPlayer/slowSender/to_send[47]}]]
+connect_debug_port u_ila_0/probe5 [get_nets [list {audioBuffer/address[0]} {audioBuffer/address[1]} {audioBuffer/address[2]} {audioBuffer/address[3]} {audioBuffer/address[4]} {audioBuffer/address[5]} {audioBuffer/address[6]} {audioBuffer/address[7]} {audioBuffer/address[8]} {audioBuffer/address[9]}]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe6]
-set_property port_width 8 [get_debug_ports u_ila_0/probe6]
+set_property port_width 1 [get_debug_ports u_ila_0/probe6]
-connect_debug_port u_ila_0/probe6 [get_nets [list {realSdPlayer/dataHandler/buffer\\.dina[0]} {realSdPlayer/dataHandler/buffer\\.dina[1]} {realSdPlayer/dataHandler/buffer\\.dina[2]} {realSdPlayer/dataHandler/buffer\\.dina[3]} {realSdPlayer/dataHandler/buffer\\.dina[4]} {realSdPlayer/dataHandler/buffer\\.dina[5]} {realSdPlayer/dataHandler/buffer\\.dina[6]} {realSdPlayer/dataHandler/buffer\\.dina[7]}]]
+connect_debug_port u_ila_0/probe6 [get_nets [list realSdPlayer/fast_clk]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe7]
-set_property port_width 6 [get_debug_ports u_ila_0/probe7]
+set_property port_width 1 [get_debug_ports u_ila_0/probe7]
-connect_debug_port u_ila_0/probe7 [get_nets [list {realSdPlayer/cmd[0]} {realSdPlayer/cmd[1]} {realSdPlayer/cmd[2]} {realSdPlayer/cmd[3]} {realSdPlayer/cmd[4]} {realSdPlayer/cmd[5]}]]
+connect_debug_port u_ila_0/probe7 [get_nets [list realSdPlayer/read_command_listen]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe8]
 set_property port_width 1 [get_debug_ports u_ila_0/probe8]
-connect_debug_port u_ila_0/probe8 [get_nets [list {realSdPlayer/dataHandler/buffer\\.address_half}]]
+connect_debug_port u_ila_0/probe8 [get_nets [list realSdPlayer/read_command_received]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe9]
 set_property port_width 1 [get_debug_ports u_ila_0/probe9]
-connect_debug_port u_ila_0/probe9 [get_nets [list {realSdPlayer/dataHandler/buffer\\.clka}]]
+connect_debug_port u_ila_0/probe9 [get_nets [list realSdPlayer/send_command_ready]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe10]
 set_property port_width 1 [get_debug_ports u_ila_0/probe10]
-connect_debug_port u_ila_0/probe10 [get_nets [list {realSdPlayer/dataHandler/buffer\\.ena}]]
+connect_debug_port u_ila_0/probe10 [get_nets [list realSdPlayer/send_command_start]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe11]
 set_property port_width 1 [get_debug_ports u_ila_0/probe11]
-connect_debug_port u_ila_0/probe11 [get_nets [list realSdPlayer/fast_clk]]
+connect_debug_port u_ila_0/probe11 [get_nets [list realSdPlayer/slowSender/send_sd_cmd]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe12]
 set_property port_width 1 [get_debug_ports u_ila_0/probe12]
-connect_debug_port u_ila_0/probe12 [get_nets [list realSdPlayer/fast_clk_enable]]
+connect_debug_port u_ila_0/probe12 [get_nets [list realSdPlayer/slow_clk]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe13]
 set_property port_width 1 [get_debug_ports u_ila_0/probe13]
-connect_debug_port u_ila_0/probe13 [get_nets [list realSdPlayer/read_command_listen]]
+connect_debug_port u_ila_0/probe13 [get_nets [list realSdPlayer/stored_sd_cmd]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe14]
 set_property port_width 1 [get_debug_ports u_ila_0/probe14]
 connect_debug_port u_ila_0/probe14 [get_nets [list realSdPlayer/read_command_received]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe15]
 set_property port_width 1 [get_debug_ports u_ila_0/probe15]
 connect_debug_port u_ila_0/probe15 [get_nets [list reset]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe16]
 set_property port_width 1 [get_debug_ports u_ila_0/probe16]
 connect_debug_port u_ila_0/probe16 [get_nets [list realSdPlayer/sd_data]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe17]
 set_property port_width 1 [get_debug_ports u_ila_0/probe17]
 connect_debug_port u_ila_0/probe17 [get_nets [list realSdPlayer/send_command_ready]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe18]
 set_property port_width 1 [get_debug_ports u_ila_0/probe18]
 connect_debug_port u_ila_0/probe18 [get_nets [list realSdPlayer/send_command_start]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe19]
 set_property port_width 1 [get_debug_ports u_ila_0/probe19]
 connect_debug_port u_ila_0/probe19 [get_nets [list realSdPlayer/slowSender/send_sd_cmd]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe20]
 set_property port_width 1 [get_debug_ports u_ila_0/probe20]
 connect_debug_port u_ila_0/probe20 [get_nets [list realSdPlayer/slow_clk]]
 create_debug_port u_ila_0 probe
 set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe21]
 set_property port_width 1 [get_debug_ports u_ila_0/probe21]
 connect_debug_port u_ila_0/probe21 [get_nets [list realSdPlayer/stored_sd_cmd]]
 set_property C_CLK_INPUT_FREQ_HZ 300000000 [get_debug_cores dbg_hub]
 set_property C_ENABLE_CLK_DIVIDER false [get_debug_cores dbg_hub]
 set_property C_USER_SCAN_CHAIN 1 [get_debug_cores dbg_hub]
@@ -45,7 +45,7 @@
    <Option Name="SimulatorGccVersionActiveHdl" Val="9.3.0"/>
    <Option Name="BoardPart" Val=""/>
    <Option Name="SourceMgmtMode" Val="DisplayOnly"/>
-    <Option Name="ActiveSimSet" Val="sd_controller_tb"/>
+    <Option Name="ActiveSimSet" Val="read_data_tb"/>
    <Option Name="DefaultLib" Val="xil_defaultlib"/>
    <Option Name="ProjectType" Val="Default"/>
    <Option Name="IPRepoPath" Val="$PPRDIR/../../../fpga/vivado-library"/>
@@ -61,7 +61,7 @@
    <Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
    <Option Name="EnableBDX" Val="FALSE"/>
    <Option Name="DSABoardId" Val="nexys-a7-100t"/>
-    <Option Name="WTXSimLaunchSim" Val="211"/>
+    <Option Name="WTXSimLaunchSim" Val="237"/>
    <Option Name="WTModelSimLaunchSim" Val="0"/>
    <Option Name="WTQuestaLaunchSim" Val="0"/>
    <Option Name="WTIesLaunchSim" Val="0"/>
@@ -169,13 +169,6 @@
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/segment_display/seconds_display.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/nexys_a7_top.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
@@ -237,6 +230,13 @@
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/segment_display/sixty_display.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="nexys_a7_top"/>
@@ -599,6 +599,7 @@
      </Config>
    </FileSet>
    <FileSet Name="sd_controller_tb" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sd_controller_tb" RelGenDir="$PGENDIR/sd_controller_tb">
      <Filter Type="Srcs"/>
      <File Path="$PPRDIR/verification/sd/sd_controller_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
@@ -695,58 +696,58 @@
        <Step Id="write_bitstream"/>
      </Strategy>
      <ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024" CtrlBit="true">
-        <ReportConfig DisplayName="Timing Summary - Design Initialization" Name="impl_1_copy_1_init_report_timing_summary_0" Spec="report_timing_summary" RunStep="init_design" ReportFile="nexys_a7_top_timing_summary_init.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Design Initialization" Name="impl_1_copy_1_init_report_timing_summary_0" Spec="report_timing_summary" RunStep="init_design" ReportFile="nexys_a7_top_timing_summary_init_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="DRC - Opt Design" Name="impl_1_copy_1_opt_report_drc_0" Spec="report_drc" RunStep="opt_design" ReportFile="nexys_a7_top_drc_opted.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="DRC - Opt Design" Name="impl_1_copy_1_opt_report_drc_0" Spec="report_drc" RunStep="opt_design" ReportFile="nexys_a7_top_drc_opted_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Opt Design" Name="impl_1_copy_1_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="opt_design" ReportFile="nexys_a7_top_timing_summary_opted.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Opt Design" Name="impl_1_copy_1_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="opt_design" ReportFile="nexys_a7_top_timing_summary_opted_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Power Opt Design" Name="impl_1_copy_1_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="power_opt_design" ReportFile="nexys_a7_top_timing_summary_pwropted.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Power Opt Design" Name="impl_1_copy_1_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="power_opt_design" ReportFile="nexys_a7_top_timing_summary_pwropted_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="IO - Place Design" Name="impl_1_copy_1_place_report_io_0" Spec="report_io" RunStep="place_design" ReportFile="nexys_a7_top_io_placed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="IO - Place Design" Name="impl_1_copy_1_place_report_io_0" Spec="report_io" RunStep="place_design" ReportFile="nexys_a7_top_io_placed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Utilization - Place Design" Name="impl_1_copy_1_place_report_utilization_0" Spec="report_utilization" RunStep="place_design" ReportFile="nexys_a7_top_utilization_placed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Utilization - Place Design" Name="impl_1_copy_1_place_report_utilization_0" Spec="report_utilization" RunStep="place_design" ReportFile="nexys_a7_top_utilization_placed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Control Sets - Place Design" Name="impl_1_copy_1_place_report_control_sets_0" Spec="report_control_sets" RunStep="place_design" ReportFile="nexys_a7_top_control_sets_placed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Control Sets - Place Design" Name="impl_1_copy_1_place_report_control_sets_0" Spec="report_control_sets" RunStep="place_design" ReportFile="nexys_a7_top_control_sets_placed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="verbose" Type="" Value="true"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_1_place_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_pre_placed.rpt.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_1_place_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_pre_placed.rpt_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_1_place_report_incremental_reuse_1" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_placed.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_1_place_report_incremental_reuse_1" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_placed_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Place Design" Name="impl_1_copy_1_place_report_timing_summary_0" Spec="report_timing_summary" RunStep="place_design" ReportFile="nexys_a7_top_timing_summary_placed.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Place Design" Name="impl_1_copy_1_place_report_timing_summary_0" Spec="report_timing_summary" RunStep="place_design" ReportFile="nexys_a7_top_timing_summary_placed_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Post-Place Power Opt Design" Name="impl_1_copy_1_post_place_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_place_power_opt_design" ReportFile="nexys_a7_top_timing_summary_postplace_pwropted.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Post-Place Power Opt Design" Name="impl_1_copy_1_post_place_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_place_power_opt_design" ReportFile="nexys_a7_top_timing_summary_postplace_pwropted_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Post-Place Phys Opt Design" Name="impl_1_copy_1_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="phys_opt_design" ReportFile="nexys_a7_top_timing_summary_physopted.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Post-Place Phys Opt Design" Name="impl_1_copy_1_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="phys_opt_design" ReportFile="nexys_a7_top_timing_summary_physopted_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
@@ -755,50 +756,50 @@
        <ReportConfig DisplayName="implementation_log" Name="impl_1_copy_1_route_implementation_log_0" Spec="" RunStep="route_design" ReportFile="nexys_a7_top.vdi">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="DRC - Route Design" Name="impl_1_copy_1_route_report_drc_0" Spec="report_drc" RunStep="route_design" ReportFile="nexys_a7_top_drc_routed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="DRC - Route Design" Name="impl_1_copy_1_route_report_drc_0" Spec="report_drc" RunStep="route_design" ReportFile="nexys_a7_top_drc_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Methodology - Route Design" Name="impl_1_copy_1_route_report_methodology_0" Spec="report_methodology" RunStep="route_design" ReportFile="nexys_a7_top_methodology_drc_routed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Methodology - Route Design" Name="impl_1_copy_1_route_report_methodology_0" Spec="report_methodology" RunStep="route_design" ReportFile="nexys_a7_top_methodology_drc_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Power - Route Design" Name="impl_1_copy_1_route_report_power_0" Spec="report_power" RunStep="route_design" ReportFile="nexys_a7_top_power_routed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Power - Route Design" Name="impl_1_copy_1_route_report_power_0" Spec="report_power" RunStep="route_design" ReportFile="nexys_a7_top_power_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Route Status - Route Design" Name="impl_1_copy_1_route_report_route_status_0" Spec="report_route_status" RunStep="route_design" ReportFile="nexys_a7_top_route_status.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Route Status - Route Design" Name="impl_1_copy_1_route_report_route_status_0" Spec="report_route_status" RunStep="route_design" ReportFile="nexys_a7_top_route_status_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Route Design" Name="impl_1_copy_1_route_report_timing_summary_0" Spec="report_timing_summary" RunStep="route_design" ReportFile="nexys_a7_top_timing_summary_routed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Timing Summary - Route Design" Name="impl_1_copy_1_route_report_timing_summary_0" Spec="report_timing_summary" RunStep="route_design" ReportFile="nexys_a7_top_timing_summary_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Incremental Reuse - Route Design" Name="impl_1_copy_1_route_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="route_design" ReportFile="nexys_a7_top_incremental_reuse_routed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Incremental Reuse - Route Design" Name="impl_1_copy_1_route_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="route_design" ReportFile="nexys_a7_top_incremental_reuse_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Clock Utilization - Route Design" Name="impl_1_copy_1_route_report_clock_utilization_0" Spec="report_clock_utilization" RunStep="route_design" ReportFile="nexys_a7_top_clock_utilization_routed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Clock Utilization - Route Design" Name="impl_1_copy_1_route_report_clock_utilization_0" Spec="report_clock_utilization" RunStep="route_design" ReportFile="nexys_a7_top_clock_utilization_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Bus Skew - Route Design" Name="impl_1_copy_1_route_report_bus_skew_0" Spec="report_bus_skew" RunStep="route_design" ReportFile="nexys_a7_top_bus_skew_routed.rpt" Version="1" Minor="1">
+        <ReportConfig DisplayName="Bus Skew - Route Design" Name="impl_1_copy_1_route_report_bus_skew_0" Spec="report_bus_skew" RunStep="route_design" ReportFile="nexys_a7_top_bus_skew_routed_1.rpt" Version="1" Minor="1">
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Post-Route Phys Opt Design" Name="impl_1_copy_1_post_route_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_timing_summary_postroute_physopted.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Timing Summary - Post-Route Phys Opt Design" Name="impl_1_copy_1_post_route_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_timing_summary_postroute_physopted_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Bus Skew - Post-Route Phys Opt Design" Name="impl_1_copy_1_post_route_phys_opt_report_bus_skew_0" Spec="report_bus_skew" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_bus_skew_postroute_physopted.rpt" Version="1" Minor="1">
+        <ReportConfig DisplayName="Bus Skew - Post-Route Phys Opt Design" Name="impl_1_copy_1_post_route_phys_opt_report_bus_skew_0" Spec="report_bus_skew" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_bus_skew_postroute_physopted_1.rpt" Version="1" Minor="1">
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
@@ -824,58 +825,58 @@
        <Step Id="write_bitstream"/>
      </Strategy>
      <ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024" CtrlBit="true">
-        <ReportConfig DisplayName="Timing Summary - Design Initialization" Name="impl_1_copy_2_init_report_timing_summary_0" Spec="report_timing_summary" RunStep="init_design" ReportFile="nexys_a7_top_timing_summary_init.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Design Initialization" Name="impl_1_copy_2_init_report_timing_summary_0" Spec="report_timing_summary" RunStep="init_design" ReportFile="nexys_a7_top_timing_summary_init_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="DRC - Opt Design" Name="impl_1_copy_2_opt_report_drc_0" Spec="report_drc" RunStep="opt_design" ReportFile="nexys_a7_top_drc_opted.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="DRC - Opt Design" Name="impl_1_copy_2_opt_report_drc_0" Spec="report_drc" RunStep="opt_design" ReportFile="nexys_a7_top_drc_opted_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Opt Design" Name="impl_1_copy_2_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="opt_design" ReportFile="nexys_a7_top_timing_summary_opted.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Opt Design" Name="impl_1_copy_2_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="opt_design" ReportFile="nexys_a7_top_timing_summary_opted_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Power Opt Design" Name="impl_1_copy_2_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="power_opt_design" ReportFile="nexys_a7_top_timing_summary_pwropted.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Power Opt Design" Name="impl_1_copy_2_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="power_opt_design" ReportFile="nexys_a7_top_timing_summary_pwropted_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="IO - Place Design" Name="impl_1_copy_2_place_report_io_0" Spec="report_io" RunStep="place_design" ReportFile="nexys_a7_top_io_placed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="IO - Place Design" Name="impl_1_copy_2_place_report_io_0" Spec="report_io" RunStep="place_design" ReportFile="nexys_a7_top_io_placed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Utilization - Place Design" Name="impl_1_copy_2_place_report_utilization_0" Spec="report_utilization" RunStep="place_design" ReportFile="nexys_a7_top_utilization_placed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Utilization - Place Design" Name="impl_1_copy_2_place_report_utilization_0" Spec="report_utilization" RunStep="place_design" ReportFile="nexys_a7_top_utilization_placed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Control Sets - Place Design" Name="impl_1_copy_2_place_report_control_sets_0" Spec="report_control_sets" RunStep="place_design" ReportFile="nexys_a7_top_control_sets_placed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Control Sets - Place Design" Name="impl_1_copy_2_place_report_control_sets_0" Spec="report_control_sets" RunStep="place_design" ReportFile="nexys_a7_top_control_sets_placed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="verbose" Type="" Value="true"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_2_place_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_pre_placed.rpt.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_2_place_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_pre_placed.rpt_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_2_place_report_incremental_reuse_1" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_placed.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_2_place_report_incremental_reuse_1" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_placed_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Place Design" Name="impl_1_copy_2_place_report_timing_summary_0" Spec="report_timing_summary" RunStep="place_design" ReportFile="nexys_a7_top_timing_summary_placed.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Place Design" Name="impl_1_copy_2_place_report_timing_summary_0" Spec="report_timing_summary" RunStep="place_design" ReportFile="nexys_a7_top_timing_summary_placed_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Post-Place Power Opt Design" Name="impl_1_copy_2_post_place_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_place_power_opt_design" ReportFile="nexys_a7_top_timing_summary_postplace_pwropted.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Post-Place Power Opt Design" Name="impl_1_copy_2_post_place_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_place_power_opt_design" ReportFile="nexys_a7_top_timing_summary_postplace_pwropted_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Post-Place Phys Opt Design" Name="impl_1_copy_2_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="phys_opt_design" ReportFile="nexys_a7_top_timing_summary_physopted.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Post-Place Phys Opt Design" Name="impl_1_copy_2_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="phys_opt_design" ReportFile="nexys_a7_top_timing_summary_physopted_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
@@ -884,50 +885,50 @@
        <ReportConfig DisplayName="implementation_log" Name="impl_1_copy_2_route_implementation_log_0" Spec="" RunStep="route_design" ReportFile="nexys_a7_top.vdi">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="DRC - Route Design" Name="impl_1_copy_2_route_report_drc_0" Spec="report_drc" RunStep="route_design" ReportFile="nexys_a7_top_drc_routed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="DRC - Route Design" Name="impl_1_copy_2_route_report_drc_0" Spec="report_drc" RunStep="route_design" ReportFile="nexys_a7_top_drc_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Methodology - Route Design" Name="impl_1_copy_2_route_report_methodology_0" Spec="report_methodology" RunStep="route_design" ReportFile="nexys_a7_top_methodology_drc_routed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Methodology - Route Design" Name="impl_1_copy_2_route_report_methodology_0" Spec="report_methodology" RunStep="route_design" ReportFile="nexys_a7_top_methodology_drc_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Power - Route Design" Name="impl_1_copy_2_route_report_power_0" Spec="report_power" RunStep="route_design" ReportFile="nexys_a7_top_power_routed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Power - Route Design" Name="impl_1_copy_2_route_report_power_0" Spec="report_power" RunStep="route_design" ReportFile="nexys_a7_top_power_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Route Status - Route Design" Name="impl_1_copy_2_route_report_route_status_0" Spec="report_route_status" RunStep="route_design" ReportFile="nexys_a7_top_route_status.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Route Status - Route Design" Name="impl_1_copy_2_route_report_route_status_0" Spec="report_route_status" RunStep="route_design" ReportFile="nexys_a7_top_route_status_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Route Design" Name="impl_1_copy_2_route_report_timing_summary_0" Spec="report_timing_summary" RunStep="route_design" ReportFile="nexys_a7_top_timing_summary_routed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Timing Summary - Route Design" Name="impl_1_copy_2_route_report_timing_summary_0" Spec="report_timing_summary" RunStep="route_design" ReportFile="nexys_a7_top_timing_summary_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Incremental Reuse - Route Design" Name="impl_1_copy_2_route_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="route_design" ReportFile="nexys_a7_top_incremental_reuse_routed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Incremental Reuse - Route Design" Name="impl_1_copy_2_route_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="route_design" ReportFile="nexys_a7_top_incremental_reuse_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Clock Utilization - Route Design" Name="impl_1_copy_2_route_report_clock_utilization_0" Spec="report_clock_utilization" RunStep="route_design" ReportFile="nexys_a7_top_clock_utilization_routed.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Clock Utilization - Route Design" Name="impl_1_copy_2_route_report_clock_utilization_0" Spec="report_clock_utilization" RunStep="route_design" ReportFile="nexys_a7_top_clock_utilization_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Bus Skew - Route Design" Name="impl_1_copy_2_route_report_bus_skew_0" Spec="report_bus_skew" RunStep="route_design" ReportFile="nexys_a7_top_bus_skew_routed.rpt" Version="1" Minor="1">
+        <ReportConfig DisplayName="Bus Skew - Route Design" Name="impl_1_copy_2_route_report_bus_skew_0" Spec="report_bus_skew" RunStep="route_design" ReportFile="nexys_a7_top_bus_skew_routed_1.rpt" Version="1" Minor="1">
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Post-Route Phys Opt Design" Name="impl_1_copy_2_post_route_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_timing_summary_postroute_physopted.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Timing Summary - Post-Route Phys Opt Design" Name="impl_1_copy_2_post_route_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_timing_summary_postroute_physopted_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Bus Skew - Post-Route Phys Opt Design" Name="impl_1_copy_2_post_route_phys_opt_report_bus_skew_0" Spec="report_bus_skew" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_bus_skew_postroute_physopted.rpt" Version="1" Minor="1">
+        <ReportConfig DisplayName="Bus Skew - Post-Route Phys Opt Design" Name="impl_1_copy_2_post_route_phys_opt_report_bus_skew_0" Spec="report_bus_skew" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_bus_skew_postroute_physopted_1.rpt" Version="1" Minor="1">
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
@@ -953,58 +954,58 @@
        <Step Id="write_bitstream"/>
      </Strategy>
      <ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024" CtrlBit="true">
-        <ReportConfig DisplayName="Timing Summary - Design Initialization" Name="impl_1_copy_3_init_report_timing_summary_0" Spec="report_timing_summary" RunStep="init_design" ReportFile="nexys_a7_top_timing_summary_init_1.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Design Initialization" Name="impl_1_copy_3_init_report_timing_summary_0" Spec="report_timing_summary" RunStep="init_design" ReportFile="nexys_a7_top_timing_summary_init.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="DRC - Opt Design" Name="impl_1_copy_3_opt_report_drc_0" Spec="report_drc" RunStep="opt_design" ReportFile="nexys_a7_top_drc_opted_1.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="DRC - Opt Design" Name="impl_1_copy_3_opt_report_drc_0" Spec="report_drc" RunStep="opt_design" ReportFile="nexys_a7_top_drc_opted.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Opt Design" Name="impl_1_copy_3_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="opt_design" ReportFile="nexys_a7_top_timing_summary_opted_1.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Opt Design" Name="impl_1_copy_3_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="opt_design" ReportFile="nexys_a7_top_timing_summary_opted.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Power Opt Design" Name="impl_1_copy_3_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="power_opt_design" ReportFile="nexys_a7_top_timing_summary_pwropted_1.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Power Opt Design" Name="impl_1_copy_3_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="power_opt_design" ReportFile="nexys_a7_top_timing_summary_pwropted.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="IO - Place Design" Name="impl_1_copy_3_place_report_io_0" Spec="report_io" RunStep="place_design" ReportFile="nexys_a7_top_io_placed_1.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="IO - Place Design" Name="impl_1_copy_3_place_report_io_0" Spec="report_io" RunStep="place_design" ReportFile="nexys_a7_top_io_placed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Utilization - Place Design" Name="impl_1_copy_3_place_report_utilization_0" Spec="report_utilization" RunStep="place_design" ReportFile="nexys_a7_top_utilization_placed_1.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Utilization - Place Design" Name="impl_1_copy_3_place_report_utilization_0" Spec="report_utilization" RunStep="place_design" ReportFile="nexys_a7_top_utilization_placed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Control Sets - Place Design" Name="impl_1_copy_3_place_report_control_sets_0" Spec="report_control_sets" RunStep="place_design" ReportFile="nexys_a7_top_control_sets_placed_1.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Control Sets - Place Design" Name="impl_1_copy_3_place_report_control_sets_0" Spec="report_control_sets" RunStep="place_design" ReportFile="nexys_a7_top_control_sets_placed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="verbose" Type="" Value="true"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_3_place_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_pre_placed.rpt_1.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_3_place_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_pre_placed.rpt.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_3_place_report_incremental_reuse_1" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_placed_1.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_3_place_report_incremental_reuse_1" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_placed.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Place Design" Name="impl_1_copy_3_place_report_timing_summary_0" Spec="report_timing_summary" RunStep="place_design" ReportFile="nexys_a7_top_timing_summary_placed_1.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Place Design" Name="impl_1_copy_3_place_report_timing_summary_0" Spec="report_timing_summary" RunStep="place_design" ReportFile="nexys_a7_top_timing_summary_placed.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Post-Place Power Opt Design" Name="impl_1_copy_3_post_place_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_place_power_opt_design" ReportFile="nexys_a7_top_timing_summary_postplace_pwropted_1.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Post-Place Power Opt Design" Name="impl_1_copy_3_post_place_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_place_power_opt_design" ReportFile="nexys_a7_top_timing_summary_postplace_pwropted.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Post-Place Phys Opt Design" Name="impl_1_copy_3_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="phys_opt_design" ReportFile="nexys_a7_top_timing_summary_physopted_1.rpt" Version="1" Minor="0" IsDisabled="true">
+        <ReportConfig DisplayName="Timing Summary - Post-Place Phys Opt Design" Name="impl_1_copy_3_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="phys_opt_design" ReportFile="nexys_a7_top_timing_summary_physopted.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
@@ -1013,50 +1014,50 @@
        <ReportConfig DisplayName="implementation_log" Name="impl_1_copy_3_route_implementation_log_0" Spec="" RunStep="route_design" ReportFile="nexys_a7_top.vdi">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="DRC - Route Design" Name="impl_1_copy_3_route_report_drc_0" Spec="report_drc" RunStep="route_design" ReportFile="nexys_a7_top_drc_routed_1.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="DRC - Route Design" Name="impl_1_copy_3_route_report_drc_0" Spec="report_drc" RunStep="route_design" ReportFile="nexys_a7_top_drc_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Methodology - Route Design" Name="impl_1_copy_3_route_report_methodology_0" Spec="report_methodology" RunStep="route_design" ReportFile="nexys_a7_top_methodology_drc_routed_1.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Methodology - Route Design" Name="impl_1_copy_3_route_report_methodology_0" Spec="report_methodology" RunStep="route_design" ReportFile="nexys_a7_top_methodology_drc_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Power - Route Design" Name="impl_1_copy_3_route_report_power_0" Spec="report_power" RunStep="route_design" ReportFile="nexys_a7_top_power_routed_1.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Power - Route Design" Name="impl_1_copy_3_route_report_power_0" Spec="report_power" RunStep="route_design" ReportFile="nexys_a7_top_power_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Route Status - Route Design" Name="impl_1_copy_3_route_report_route_status_0" Spec="report_route_status" RunStep="route_design" ReportFile="nexys_a7_top_route_status_1.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Route Status - Route Design" Name="impl_1_copy_3_route_report_route_status_0" Spec="report_route_status" RunStep="route_design" ReportFile="nexys_a7_top_route_status.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Route Design" Name="impl_1_copy_3_route_report_timing_summary_0" Spec="report_timing_summary" RunStep="route_design" ReportFile="nexys_a7_top_timing_summary_routed_1.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Timing Summary - Route Design" Name="impl_1_copy_3_route_report_timing_summary_0" Spec="report_timing_summary" RunStep="route_design" ReportFile="nexys_a7_top_timing_summary_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Incremental Reuse - Route Design" Name="impl_1_copy_3_route_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="route_design" ReportFile="nexys_a7_top_incremental_reuse_routed_1.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Incremental Reuse - Route Design" Name="impl_1_copy_3_route_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="route_design" ReportFile="nexys_a7_top_incremental_reuse_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Clock Utilization - Route Design" Name="impl_1_copy_3_route_report_clock_utilization_0" Spec="report_clock_utilization" RunStep="route_design" ReportFile="nexys_a7_top_clock_utilization_routed_1.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Clock Utilization - Route Design" Name="impl_1_copy_3_route_report_clock_utilization_0" Spec="report_clock_utilization" RunStep="route_design" ReportFile="nexys_a7_top_clock_utilization_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
-        <ReportConfig DisplayName="Bus Skew - Route Design" Name="impl_1_copy_3_route_report_bus_skew_0" Spec="report_bus_skew" RunStep="route_design" ReportFile="nexys_a7_top_bus_skew_routed_1.rpt" Version="1" Minor="1">
+        <ReportConfig DisplayName="Bus Skew - Route Design" Name="impl_1_copy_3_route_report_bus_skew_0" Spec="report_bus_skew" RunStep="route_design" ReportFile="nexys_a7_top_bus_skew_routed.rpt" Version="1" Minor="1">
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Timing Summary - Post-Route Phys Opt Design" Name="impl_1_copy_3_post_route_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_timing_summary_postroute_physopted_1.rpt" Version="1" Minor="0">
+        <ReportConfig DisplayName="Timing Summary - Post-Route Phys Opt Design" Name="impl_1_copy_3_post_route_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_timing_summary_postroute_physopted.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
-        <ReportConfig DisplayName="Bus Skew - Post-Route Phys Opt Design" Name="impl_1_copy_3_post_route_phys_opt_report_bus_skew_0" Spec="report_bus_skew" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_bus_skew_postroute_physopted_1.rpt" Version="1" Minor="1">
+        <ReportConfig DisplayName="Bus Skew - Post-Route Phys Opt Design" Name="impl_1_copy_3_post_route_phys_opt_report_bus_skew_0" Spec="report_bus_skew" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_bus_skew_postroute_physopted.rpt" Version="1" Minor="1">
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
@@ -6,6 +6,9 @@
 * @date: 6/12/2025
 *
 * */
 //define used here because verilator needs it but vivado is smart enough
 //not to. 
 `ifdef VERILATOR
    `include "sdvd_defs.sv"
 `endif
@@ -31,11 +34,14 @@ module audio_buffer(
    // Inputs for the memory buffer
    audio_buffer_interface.receiver driver
 );
-logic [9:0] address;
+// Size of samples, 8bit or 16bit supported
 parameter SIZE=16;
 (* MARK_DEBUG = "TRUE" *)
 logic [11-(SIZE/8):0] address;
 // State register
 logic enb;
-logic [15:0] doutb;
+logic [(SIZE-1):0] doutb;
 // A single bit counter, to avoid feeding samples given the 1 cycle read delay
 logic delay;
@@ -44,7 +50,7 @@ logic delay;
 // half of the 2KiB buffer
 //
 // The MSB of the address == higher/lower half address
-assign driver.address_half = address[9];
+assign driver.address_half = address[11-(SIZE/8)];
 always_ff @(posedge clk) begin
    enb <= 0;
@@ -72,10 +78,8 @@ always_ff @(posedge clk) begin
            // This will overflow to the correct value always
            address <= address + speed;
            enb <= 1;
            // NOTE: I really don't know a good way to generate the load
            // signal. It maybe could be an inverted 48khz clock?
            if (delay == 0) begin
-                sample <= doutb;
+                sample[15-:SIZE] <= doutb;
            end
            else begin
                sample <= '0;
@@ -86,12 +90,10 @@ always_ff @(posedge clk) begin
    end
 end
-//xpm_memory_sdpram #(
+//vivado block ram xpm macro
 //    .WRITE_DATA_WIDTH_A(16)
 //) buffer ();
 xpm_memory_sdpram #(
  .ADDR_WIDTH_A(11),                    // DECIMAL
-  .ADDR_WIDTH_B(10),               // DECIMAL
+  .ADDR_WIDTH_B(12-(SIZE/8)),           // DECIMAL
  .AUTO_SLEEP_TIME(0),                  // DECIMAL
  .BYTE_WRITE_WIDTH_A(8),               // DECIMAL
  .CASCADE_HEIGHT(0),                   // DECIMAL
@@ -107,7 +109,7 @@ xpm_memory_sdpram #(
  .MEMORY_SIZE(16*1024),                // DECIMAL
  .MESSAGE_CONTROL(0),                  // DECIMAL
  .RAM_DECOMP("auto"),                  // String
-  .READ_DATA_WIDTH_B(16),         // DECIMAL
+  .READ_DATA_WIDTH_B(SIZE),             // DECIMAL
  .READ_LATENCY_B(1),                   // DECIMAL
  .READ_RESET_VALUE_B("0"),             // String
  .RST_MODE_A("SYNC"),                  // String
@@ -137,7 +139,6 @@ buffer (
  .enb(enb),              // 1-bit input: Memory enable signal for port B. Must be high on clock
                          // cycles when read operations are initiated. Pipelined internally.
 //active high reset
  .rstb(reset),           // 1-bit input: Reset signal for the final port B output register stage.
                          // Synchronously resets output port doutb to the value specified by
                          // parameter READ_RESET_VALUE_B.
@@ -147,11 +148,10 @@ buffer (
                          // writing one byte of dina to address addra. For example, to
                          // synchronously write only bits [15-8] of dina when WRITE_DATA_WIDTH_A
                          // is 32, wea would be 4'b0010.
-  // Extra inputs that I guess I need
+  
-  .sleep(0),
+  .sleep(0),              // The XPM macros say these can be removed, but when I did this the
-  .injectsbiterra(0),
+  .injectsbiterra(0),     // entire block memory got optimized out. These were readded in later
  .injectdbiterra(0),
  // With a latency of 1 this surely does not matter
  .regceb(enb)
 );
@@ -21,6 +21,7 @@ module pwm(
 parameter DEPTH=11;
 logic [DEPTH-1:0] pulse_counter;
 (* MARK_DEBUG = "TRUE" *)
 logic [15:0] sample_buffer;
 logic should_output;
@@ -6,7 +6,7 @@
 * @author: Waylon Cude, Dilanthi Prentice
 * @date: 6/12/2025
 * */
-
+//Define used because verilator needs it but vivado is samrt enough not to
 `ifdef VERILATOR
    `include "sdvd_defs.sv"
 `endif
@@ -19,7 +19,7 @@ module low_freq_clock_gen(
    output logic clk1k, clk10h, seconds_pulse
 );
-// Hardcoded to be 1,000,000/4,000
+// Hardcoded to be 1,000,000/4,000 (25,000)
 // Relying on constant maths makes it the wrong size
 localparam num_cycles = 25_000;
@@ -1,18 +1,21 @@
 /****
 * modular_clock_gen.sv - parameterizable clock divider.
 *
 * @author: Waylon Cude, Dilanthi Prentice
 * @date: 6/12/2025
 *
 * */
 module modular_clock_gen(
    input clk, reset,
    output logic oclk
 );
 //parameter has no default because the user should always set it
 parameter DIVISOR;
 logic [$clog2(DIVISOR)-1:0] counter;
 logic set;
 // clock will be high for about half of the cycle, depending on integer
 // rounding
 // OOPS this makes it combinational
 //assign oclk = counter < (DIVISOR/2);
 always_ff @(posedge clk) begin
    // modular clock has to keep ticking through reset
    // so everything with a synchronous reset actually works
@@ -88,16 +88,19 @@ end
 display_anode_driver anodeDriver(clk_1khz,reset,AN,segment_mux_select);
-seconds_display secondsSegment (seconds, segments[1], segments[0]);
+sixty_display secondsSegment (seconds, segments[1], segments[0]);
-seconds_display minutesSegment (minutes, segments[3], segments[2]);
+sixty_display minutesSegment (minutes, segments[3], segments[2]);
-seconds_display hoursSegment (hours, segments[5], segments[4]);
+sixty_display hoursSegment (hours, segments[5], segments[4]);
 // Run the playback speed state machine at a lower rate
 // Gets rid of button bouncing
 playback_controller playbackController (clk_10hz,reset,BTNC, BTNR, speed);
-pwm audioOutput(CLK100MHZ, reset, clk_48khz, audio_sample, AUD_PWM);
+
-audio_buffer audioBuffer(
+`ifdef ROM
    rom_sd #("even_flow_16.mem") romSdPlayer(clk_1mhz,reset,sd_ready,audio_interface.driver);
    assign {SD_RESET,SD_DAT,SD_CMD,SD_SCK} = 'z;
    audio_buffer audioBuffer(
        clk_48khz, 
        reset, 
        sd_ready, 
@@ -106,36 +109,48 @@ audio_buffer audioBuffer(
        playing,
        audio_sample, 
        audio_interface.receiver
-);
+    );
-
+    pwm audioOutput(CLK100MHZ, reset, clk_48khz, audio_sample, AUD_PWM);
 `ifdef ROM
    rom_sd #("even_flow_16.mem") romSdPlayer(clk_1mhz,reset,sd_ready,audio_interface.driver);
    assign {SD_RESET,SD_DAT,SD_CMD,SD_SCK} = 'z;
 `else
    // Power the sd slot
    assign SD_RESET = 0;
    // We don't use more than one dat line
    assign SD_DAT[3:1] = 'z;
    logic clk_100khz;
    logic clk_25mhz;
-    // Actually 200khz now
+    // We can clock this at around 200khz before things start breaking
-    // 200khz is slightly unstable??????
+    // Even at 200khz sometimes things break
-    modular_clock_gen #(1000) slowSdClock(CLK100MHZ, reset, clk_100khz);
+    modular_clock_gen #(500) slowSdClock(CLK100MHZ, reset, clk_100khz);
    // Try clocking this slower than max speed
-    // To see if that makes it actually work ...
+    // To see if that makes it actually work 
-    modular_clock_gen #(1000) fastSdClock(CLK100MHZ, reset, clk_25mhz);
+    //
    // NOTE: It did not make it work
    modular_clock_gen #(400) fastSdClock(CLK100MHZ, reset, clk_25mhz);
    sd_controller realSdPlayer(
        clk_100khz,
        clk_25mhz,
        CLK100MHZ,
        clk_1mhz,
        reset,
-        SD_DAT[0],
+        SD_DAT,
        SD_CMD,
        sd_ready,
        SD_SCK,
        audio_interface.driver
    );
    audio_buffer #(.SIZE(16)) audioBuffer(
        clk_48khz, 
        reset, 
        sd_ready, 
        '0, // stop signal not used right now 
        speed, 
        playing,
        audio_sample, 
        audio_interface.receiver
    );
    pwm #(11) audioOutput(CLK100MHZ, reset, clk_48khz, audio_sample, AUD_PWM);
 `endif
@@ -1,5 +1,11 @@
-// parameterizable sequential crc generator
+/***
-// This probably could be combinational logic too, though it would be way slow
+ * crc_gen.sv - paramerizable sequential crc generator. This could probably be
 *              combinational logic too (but it would be way slower)
 *
 * @author: Waylon Cude, Dilanthi Prentice
 * @date: 6/12/2025
 *
 * */
 module crc_gen #(
    parameter CRCBITS=7,
    parameter COMMANDLEN=40,
@@ -1,3 +1,11 @@
 /****
 * read_command.sv - reads the sd command line and listens for sd command
 *                   responses.
 * 
 * @author: Waylon Cude, Dilanthi Prentice
 * @date: 6/12/2025
 *
 * **/
 module read_command(
    input logic clk,
    input logic reset,
@@ -19,8 +27,8 @@ logic received_reg;
 logic [2:0] response_type_reg;
-// oops this was set a cycle before the data was actually ready
+// recevied was set a cycle before the data was actually ready
-// and if it's just a reg it holds for too long
+// and if it's just a register it holds for too long
 // use both for maximum reactivity
 assign received = received_reg && !listen;
@@ -1,11 +1,17 @@
-// Whenever we receive a data block, start spitting bytes out into the audio
+/***
-// buffer bram. This could always be clocked at the 25MHz default speed clock,
+ * read_data.sv - whenever we receive a data block, start spitting bytes out
-// or it could switch over like the writer has to
+ *                into the audio buffer block ram. This could be clocked at
 *                25MHz default speed clock, or it could swtich over like the
 *                writer has to.
 * @author: Waylon Cude, Dilanthi Prentice
 * @date: 6/12/2025
 *
 ***/
 module read_data(
    input clk,
    input mem_clk,
    input reset,
-    input sd_data,
+    input [3:0] sd_data,
    (* MARK_DEBUG = "TRUE" *)
    audio_buffer_interface.driver buffer
 );
 //  Block data is a start bit, 512 bytes sent msb first, then a CRC16 and end
@@ -16,7 +22,7 @@ module read_data(
 // played. However, as long as the sd card controller doesn't request extra
 // blocks this shouldn't be an issue
-localparam BLOCK_SIZE=512*8+16+2;
+localparam BLOCK_SIZE=512*2+16*4+2;
 logic [$clog2(BLOCK_SIZE):0] counter;
 logic [7:0] byte_shift;
@@ -28,36 +34,41 @@ assign buffer.clka = clk;
 always_ff @(posedge clk) begin
    if (reset) begin
        buffer.ena <= 0;
-        buffer.addra <= '1;
+        // Start negative so adding bytes will get us to the right address
        buffer.addra <= 0 - 512;
        buffer.dina <= 0;
    end
    else begin
-        // We ignore the lower 17 bits of the block
+        // We ignore the lower 16*4+1 bits of the block
-        if (counter > 16) begin
+        // CRC is apparently sent on each line, back to back
        if (counter > 16*4) begin
            counter <= counter - 1;
-            byte_shift <= {byte_shift[6:0],sd_data};
+            byte_shift <= {byte_shift[3:0],sd_data};
            byte_counter <= byte_counter - 1;
            // Store received byte in audio buffer and reset counter
            if (byte_counter == 0) begin
-                byte_counter <= 7;
+                byte_counter <= 1;
-                buffer.dina <= byte_shift;//{byte_shift[6:0],sd_data};
+                buffer.dina <= {byte_shift[3:0],sd_data};
                buffer.ena <= 1;
            end
            // Turn the enable signal off so we don't accidentally write
            // anything weird
-            if (byte_counter == 4) begin
+            if (byte_counter == 1) begin
-                buffer.ena <= 0;
+                buffer.addra <= buffer.addra - 1;
                buffer.addra <= buffer.addra + 1;
            end
        end
-        else if (counter != 0)
+        else if (counter != 0) begin
            counter<=counter-1;
            buffer.ena <= 0;
        end
        else if (sd_data == 0) begin
-            counter <= BLOCK_SIZE-1;
+            // In wide bus mode we read bytes in a descending order
-            byte_counter <= 8;
+            buffer.addra <= buffer.addra + 1024;
            counter <= BLOCK_SIZE;
            byte_counter <= 3;
        end
    end
 end
@@ -12,9 +12,10 @@ module sd_controller(
 (* MARK_DEBUG = "TRUE" *)
    input logic fast_clk,
    input logic crc_clk,
    input logic mem_clk,
    input logic reset,
 (* MARK_DEBUG = "TRUE" *)
-    input logic sd_data,
+    input logic [3:0] sd_data,
    inout logic sd_cmd,
    output logic ready,
    output wire clk,
@@ -22,7 +23,6 @@ module sd_controller(
    audio_buffer_interface.driver buffer
 );
 // NOTE: this gets encoded as one-hot, even if in here I set it as a logic[5:0]
 (* MARK_DEBUG = "TRUE" *)
 enum logic [5:0] {
    INIT,WAIT,SEND_CMD0,WAIT_CMD0,DELAY_CMD0, // last 4
    SEND_CMD8,WAIT_CMD8,LISTEN_RESPONSE_CMD8,WAIT_RESPONSE_CMD8, // last 8
@@ -31,13 +31,15 @@ enum logic [5:0] {
    SEND_CMD2,WAIT_CMD2,LISTEN_RESPONSE_CMD2,WAIT_RESPONSE_CMD2, //21
    SEND_CMD3,WAIT_CMD3,LISTEN_RESPONSE_CMD3,WAIT_RESPONSE_CMD3, //25
    SEND_CMD7,WAIT_CMD7,LISTEN_RESPONSE_CMD7,WAIT_RESPONSE_CMD7, //29
    SEND2_CMD55,WAIT2_CMD55,LISTEN_RESPONSE2_CMD55,WAIT_RESPONSE2_CMD55,
    SEND_ACMD6,WAIT_ACMD6,LISTEN_RESPONSE_ACMD6,WAIT_RESPONSE_ACMD6,
    READY_TO_TRANSMIT,
    DELAY_CLOCK_SWITCH,
    TRANSMIT,WAIT_TRANSMIT,WAIT_END,FINISH_TRANSMIT,
    TRANSMIT2,WAIT_TRANSMIT2,WAIT_END2,FINISH_TRANSMIT2,
    WAIT_FOR_BUFFER
    } state, next_state;
 (* MARK_DEBUG = "TRUE" *)
 logic fast_clk_enable;
 assign clk = fast_clk_enable ? fast_clk : slow_clk;
@@ -49,7 +51,6 @@ logic [31:0] address;
 logic send_command_start;//, send_command_start_fast;
 (* MARK_DEBUG = "TRUE" *)
 logic [5:0] cmd;
 (* MARK_DEBUG = "TRUE" *)
 logic [31:0] arg;
 (* MARK_DEBUG = "TRUE" *)
 wire send_command_ready;//, send_command_ready_fast;
@@ -104,6 +105,7 @@ read_command slowReader(
 // The data line is only ever used at fast_clk speeds
 read_data dataHandler(
    fast_clk,
    mem_clk,
    reset,
    sd_data,
    buffer
@@ -189,7 +191,7 @@ always_comb begin
            next_state=WAIT_RESPONSE_CMD7;
        WAIT_RESPONSE_CMD7:
            if (read_command_received)
-                next_state=READY_TO_TRANSMIT;
+                next_state=SEND2_CMD55;
            else
                next_state=WAIT_RESPONSE_CMD7;
@@ -230,8 +232,42 @@ always_comb begin
            else
                next_state=ACMD41_DELAY;
        SEND2_CMD55:
            next_state=WAIT2_CMD55;
        WAIT2_CMD55:
            if (send_command_ready)
                next_state=LISTEN_RESPONSE2_CMD55;
            else
                next_state=WAIT2_CMD55;
        LISTEN_RESPONSE2_CMD55:
            next_state=WAIT_RESPONSE2_CMD55;
        WAIT_RESPONSE2_CMD55:
            if (read_command_received)
                next_state=SEND_ACMD6;
            else
                next_state=WAIT_RESPONSE2_CMD55;
        SEND_ACMD6:
            next_state=WAIT_ACMD6;
        WAIT_ACMD6:
            if (send_command_ready)
                next_state=LISTEN_RESPONSE_ACMD6;
            else
                next_state=WAIT_ACMD6;
        LISTEN_RESPONSE_ACMD6:
            next_state=WAIT_RESPONSE_ACMD6;
        WAIT_RESPONSE_ACMD6:
            if (read_command_received)
                next_state=READY_TO_TRANSMIT;
            else
                next_state=WAIT_RESPONSE_ACMD6;
        READY_TO_TRANSMIT:
-            next_state=TRANSMIT;
+            next_state=DELAY_CLOCK_SWITCH;
        DELAY_CLOCK_SWITCH:
            if (counter == 0)
                next_state = TRANSMIT;
            else
                next_state = DELAY_CLOCK_SWITCH;
        TRANSMIT:
            next_state=WAIT_TRANSMIT;
        WAIT_TRANSMIT:
@@ -310,7 +346,14 @@ always_ff @(posedge clk) begin
            arg <= 0;
            send_command_start <=1;
        end
-        LISTEN_RESPONSE_CMD55: begin
+        SEND2_CMD55: begin
            cmd <= 55;
            // the arg should be the same as the preceding command
            // and otherwise we'll lose the RCA bits
            //arg <= 0;
            send_command_start <=1;
        end
        LISTEN_RESPONSE_CMD55,LISTEN_RESPONSE2_CMD55: begin
            response_type <= 1;
            read_command_listen <= 1;
        end
@@ -327,6 +370,15 @@ always_ff @(posedge clk) begin
            read_command_listen<=0;
            counter<=100;
        end
        SEND_ACMD6: begin
            cmd <= 6;
            arg <= 'b10;
            send_command_start <=1;
        end
        LISTEN_RESPONSE_ACMD6: begin
            response_type <= 1;
            read_command_listen <= 1;
        end
        SEND_CMD2: begin
            cmd <= 2;
            arg <= 0;
@@ -358,6 +410,8 @@ always_ff @(posedge clk) begin
            fast_clk_enable <= 1;
            address <= 0;
            sd_buffer_half <= 0;
            // Wait to actually transmit until clock is running and stable
            counter <= 100;
        end
        TRANSMIT, TRANSMIT2: begin
            cmd <= 17;
@@ -366,7 +420,7 @@ always_ff @(posedge clk) begin
        end
        WAIT_TRANSMIT, WAIT_TRANSMIT2: begin
            send_command_start <= 0;
-            counter <= 411;
+            counter <= 512*2+16+1;
        end
        FINISH_TRANSMIT:
            address <= address +1;
@@ -377,12 +431,12 @@ always_ff @(posedge clk) begin
        WAIT_FOR_BUFFER:
            ready <= 1;
        // The logic is simple enough in these to group them
-        WAIT, DELAY_CMD0, ACMD41_DELAY, WAIT_END, WAIT_END2:
+        WAIT, DELAY_CMD0, ACMD41_DELAY, WAIT_END, WAIT_END2, DELAY_CLOCK_SWITCH:
            counter <= counter - 1;
-        WAIT_CMD8,WAIT_CMD55,WAIT_ACMD41,WAIT_CMD2,WAIT_CMD3,WAIT_CMD7:
+        WAIT_CMD8,WAIT_CMD55,WAIT_ACMD41,WAIT2_CMD55,WAIT_ACMD6,WAIT_CMD2,WAIT_CMD3,WAIT_CMD7:
            send_command_start<=0;
-        WAIT_RESPONSE_CMD8,WAIT_RESPONSE_CMD55,WAIT_RESPONSE_CMD2,WAIT_RESPONSE_CMD3,
+        WAIT_RESPONSE_CMD8,WAIT_RESPONSE_CMD55,WAIT_RESPONSE2_CMD55,WAIT_RESPONSE_ACMD6,
-        WAIT_RESPONSE_CMD7:
+        WAIT_RESPONSE_CMD2,WAIT_RESPONSE_CMD3,WAIT_RESPONSE_CMD7:
            read_command_listen<=0;
        default: ;
@@ -1,3 +1,11 @@
 /***
 * send_command.sv - sends sd card commands. It takes in a command and an
 *                   argument and will figure out the necessary crc. 
 *
 * @author: Waylon Cude, Dilanthi Prentice
 * @date: 6/12/2025
 *
 * */
 module send_command(
    input clk, 
    // The crc should be clocked way faster than the sender
@@ -1,30 +0,0 @@
 /***
 * seconds_display.sv - converts a five bit seconds counter to its seven segement display equivalent.
 *
 * @author: Dilanthi Prentice, Waylon Cude
 * @date: 6/12/25
 *
 */
 module seconds_display
 (
    input [$clog2(60)-1:0] seconds,
    output [6:0] display_tens,      
    output [6:0] display_ones       
 );
 logic [4:0] ones_digit; 
 logic [4:0] tens_digit;
 always_comb
 begin
    ones_digit = seconds % 10;
    tens_digit = seconds / 10;
 end
 //instantiate the display_converter to convert the counter
 //to a seven segment display number
 display_converter ones (ones_digit, display_ones);
 display_converter tens (tens_digit, display_tens);
 endmodule
@@ -0,0 +1,32 @@
 /***
 * sixty_display.sv - converts a binary digit from zero to fifty-nine to its
 *                    ones and tens digits and then gets the seven segment
 *                    display equivalents of them.
 *
 * @author: Dilanthi Prentice, Waylon Cude
 * @date: 6/12/25
 *
 */
 module sixty_display
 (
    input [$clog2(60)-1:0] number,
    output [6:0] display_tens,      
    output [6:0] display_ones       
 );
 logic [4:0] ones_digit; 
 logic [4:0] tens_digit;
 //convert digit to ones and tens places
 always_comb
 begin
    ones_digit = number % 10;
    tens_digit = number / 10;
 end
 //convert both ones and tens place digits to their seven segement equivalent
 display_converter ones (ones_digit, display_ones);
 display_converter tens (tens_digit, display_tens);
 endmodule
@@ -38,7 +38,7 @@
  entirely. Detected in testbench
 - off-by-one error detected in the counter
-## read_data
+### read_data
 - audio buffer address to write to was never changing, caught in simulation
 - some off-by-one errors in the byte shifting were found and corrected
@@ -0,0 +1,22 @@
 digraph playback_controller {
    PAUSE [shape="doublecircle",label="PAUSE\nspeed=0"];
    node [shape="ellipse"]
    PLAY [label="PLAY\nspeed=1"];
    FF2 [label="FF2\nspeed=2"];
    FF4 [label="FF4\nspeed=4"];
    FF8 [label="FF8\nspeed=8"];
    FF16 [label="FF16\nspeed=16"];
    PAUSE -> PLAY [label="play_pulse"]
    PLAY -> PAUSE [label="play_pulse"]
    PLAY -> FF2 [label="ff_pulse"]
    FF2 -> FF4 [label="ff_pulse"]
    FF4 -> FF8 [label="ff_pulse"]
    FF8 -> FF16 [label="ff_pulse"]
    FF2 -> PAUSE [label="play_pulse"];
    FF4 -> PAUSE [label="play_pulse"];
    FF8 -> PAUSE [label="play_pulse"];
    FF16 -> PAUSE [label="play_pulse"];
 }
@@ -0,0 +1,24 @@
 digraph read_command {
    IDLE [shape="doublecircle",label="IDLE\nreceived_reg=0\nout_data=0\nresponse_type_reg=response_type"]
    node [shape="ellipse"]
    START [label="START\nrecevied_reg=0\ncounter=get_bits(response_type_reg) - 2\ndata_reg=0"]
    LISTEN [label="LISTEN\ndata_reg[0]=sd_cmd"]
    RECEIVING [label="RECEIVING\ncounter--\ndata_reg={data_reg[134:0],sd_cmd}"]
    DONE [label="DONE\nout_data=data_reg\nreceived_reg=1\nreponse_type_reg=response_type"]
    IDLE -> IDLE [label="!listen"]
    IDLE -> START [label="listen"]
    START -> RECEIVING [label="sd_cmd==0"]
    START -> LISTEN [label="sd_cmd!=0"]
    LISTEN -> LISTEN [label="sd_cmd!=0"]
    LISTEN -> RECEIVING [label="sd_cmd==0"]
    RECEIVING -> DONE [label="counter==0"]
    RECEIVING -> RECEIVING [label="counter!=0"]
    DONE -> START [label="listen"]
    DONE -> DONE [label="!listen"]
 }
@@ -1,23 +1,30 @@
 digraph rom_sd {
    Reset [shape = doublecircle, label = "RESET\nbuffer_half = 0\nrom_addr = 0\nrom_enable = 1\nbuffer.addra=0\nready=0"];
    node [shape = circle];
-    Delay [label="DELAY\nrom_addr++"];
+    Delay1 [label="DELAY1\nrom_addr++"];
    Delay2 [label="DELAY2\nrom_addr++"];
    Delay3 [label="DELAY3\nrom_addr++\nbuffer.dina=rom_data\nbuffer.ena=1"];
    WriteBuf [label="WRITEBUF\nbuffer.ena=1\nbuffer.dina=rom_data\nbuffer.addra++\nrom_addr++"];
-    EndWrite [label="ENDWRITE\nbuffer.ena=1\nbuffer.data=rom_data\nbuffer.addra++\nready=1"];
+    EndWrite1 [label="ENDWRITE1\nbuffer.ena=1\nbuffer.data=rom_data\nbuffer.addra++"];
-    Wait [label = "WAIT\nbuffer.ena=0"];
+    EndWrite2 [label="ENDWRITE2\nbuffer.ena=1\nbuffer.data=rom_data\nbuffer.addra++"];
    EndWrite3 [label="ENDWRITE3\nbuffer.ena=0\nbuffer.data=rom_data\nbuffer.addra++\nready=1"];
    Wait [label = "WAIT"];
    Reset -> Reset [label="reset"];
-    Reset -> Delay [label="!reset"];
+    Reset -> Delay1 [label="!reset"];
-    Delay -> WriteBuf;
+    Delay1 -> Delay2;
    Delay2 -> Delay3;
    Delay3 -> WriteBuf;
    WriteBuf -> WriteBuf [label="buffer.addra < 1023"]
-    WriteBuf -> EndWrite [label="buffer.addra == 1023"]
+    WriteBuf -> EndWrite1 [label="buffer.addra == 1023"]
-    EndWrite -> Wait;
+    EndWrite1 -> EndWrite2;
    EndWrite2 -> EndWrite3;
    EndWrite3 -> Wait;
    Wait -> Wait [label = "buffer_half == buffer.address_half"]
-    Wait -> Delay [label = "buffer_half != buffer.address_half"]
+    Wait -> Delay1 [label = "buffer_half != buffer.address_half"]
 }
@@ -98,10 +98,33 @@ digraph sd_controller {
    LISTEN_RESPONSE_CMD7 -> WAIT_RESPONSE_CMD7;
    WAIT_RESPONSE_CMD7 -> WAIT_RESPONSE_CMD7 [label="!read_command.ready"]
    // Send CMD55+CMD41 with arg 40100000 until card is ready
    SEND2_CMD55 [label="SEND2_CMD55\ncmd=55\nstart=1"];
    WAIT2_CMD55 [label="WAIT2_CMD55\nstart=0"];
    LISTEN_RESPONSE2_CMD55 [label="LISTEN_RESPONSE2_CMD55\nresponse_type=1\nread_command.listen=1"]
    WAIT_RESPONSE2_CMD55 [label="WAIT_RESPONSE2_CMD55\nread_command.listen=0"]
    SEND_ACMD6[label="SEND_ACMD6\ncmd=6\narg=0x00000002\nstart=1"];
    WAIT_ACMD6 [label="WAIT_ACMD6\nstart=0"];
    LISTEN_RESPONSE_ACMD6 [label="LISTEN_RESPONSE_ACMD6\nresponse_type=1\nread_command.listen=1"]
    WAIT_RESPONSE_ACMD6 [label="WAIT_RESPONSE_ACMD6\nread_command.listen=0\ncounter=100"];
    WAIT_RESPONSE_CMD7 -> SEND2_CMD55 [label="read_command.received"]
    SEND2_CMD55 -> WAIT2_CMD55;
    WAIT2_CMD55 -> WAIT2_CMD55 [label="!send_command.ready"];
    WAIT2_CMD55 -> LISTEN_RESPONSE2_CMD55 [label="send_command.ready"];
    LISTEN_RESPONSE2_CMD55 -> WAIT_RESPONSE2_CMD55;
    WAIT_RESPONSE2_CMD55 -> WAIT_RESPONSE2_CMD55 [label="!read_command.received"]
    WAIT_RESPONSE2_CMD55 -> SEND_ACMD6 [label="read_command.received"]
    SEND_ACMD6 -> WAIT_ACMD6
    WAIT_ACMD6 -> WAIT_ACMD6 [label="!send_command.ready"]
    WAIT_ACMD6 -> LISTEN_RESPONSE_ACMD6[label="send_command.ready"]
    LISTEN_RESPONSE_ACMD6 -> WAIT_RESPONSE_ACMD6
    WAIT_RESPONSE_ACMD6 -> WAIT_RESPONSE_ACMD6 [label="!read_command.received"]
    // Now we can finally read blocks with CMD17
    // Swap over to the fast clock
-    READY_TO_TRANSMIT [label="READY_TO_TRANSMIT\nclk_source=fast\naddress=0\nbuffer_half=0"];
+    READY_TO_TRANSMIT [label="READY_TO_TRANSMIT\nclk_source=fast\naddress=0\nbuffer_half=0\ncounter=100"];
    DELAY_CLOCK_SWITCH [label="DELAY_CLOCK_SWITCH\ncounter--"]
    // There are two sets of states because we need to read two blocks at once
    TRANSMIT [label="TRANSMIT\ncmd=17\narg=address\nsend_command.start=1"];
    WAIT_TRANSMIT [label="WAIT_TRANSMIT\nsend_command.start=0\ncounter=4114"];
@@ -116,8 +139,10 @@ digraph sd_controller {
    // Wait for the buffer to be free, then go back to TRANSMIT
    WAIT_FOR_BUFFER [label="WAIT_FOR_BUFFER\nready=1"];
-    WAIT_RESPONSE_CMD7 -> READY_TO_TRANSMIT [label="read_command.ready"]
+    WAIT_RESPONSE_ACMD6 -> READY_TO_TRANSMIT [label="read_command.ready"]
-    READY_TO_TRANSMIT -> TRANSMIT;
+    READY_TO_TRANSMIT -> DELAY_CLOCK_SWITCH;
    DELAY_CLOCK_SWITCH -> TRANSMIT [label="counter==0"];
    DELAY_CLOCK_SWITCH -> DELAY_CLOCK_SWITCH [label="counter!=0"];
    TRANSMIT -> WAIT_TRANSMIT;
    WAIT_TRANSMIT -> WAIT_TRANSMIT [label="sd_data==1"]
    WAIT_TRANSMIT -> WAIT_END [label="sd_data==0"]
@@ -0,0 +1,905 @@
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 -->
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 <title>sd_controller</title>
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 </g>
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 <title>INIT&#45;&gt;WAIT</title>
 <path fill="none" stroke="black" d="M595,-5722.57C595,-5713.9 595,-5705.37 595,-5697.51"/>
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 </g>
 <!-- WAIT&#45;&gt;WAIT -->
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 <title>WAIT&#45;&gt;WAIT</title>
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 </g>
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 <text text-anchor="middle" x="595" y="-5493.29" font-family="Times,serif" font-size="14.00">start=1</text>
 </g>
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 </g>
 <!-- SEND_CMD0&#45;&gt;WAIT_CMD0 -->
 <g id="edge4" class="edge">
 <title>SEND_CMD0&#45;&gt;WAIT_CMD0</title>
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 </g>
 <!-- WAIT_CMD0&#45;&gt;WAIT_CMD0 -->
 <g id="edge6" class="edge">
 <title>WAIT_CMD0&#45;&gt;WAIT_CMD0</title>
 <path fill="none" stroke="black" d="M660.62,-5403.55C672.34,-5402.19 680.53,-5398.71 680.53,-5393.11 680.53,-5389.52 677.17,-5386.8 671.67,-5384.95"/>
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 <g id="edge5" class="edge">
 <title>WAIT_CMD0&#45;&gt;DELAY_CMD0</title>
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 <title>SEND_CMD8</title>
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 <text text-anchor="middle" x="595" y="-5156.84" font-family="Times,serif" font-size="14.00">SEND_CMD8</text>
 <text text-anchor="middle" x="595" y="-5140.34" font-family="Times,serif" font-size="14.00">cmd=8</text>
 <text text-anchor="middle" x="595" y="-5123.84" font-family="Times,serif" font-size="14.00">arg=0x1AA</text>
 <text text-anchor="middle" x="595" y="-5107.34" font-family="Times,serif" font-size="14.00">start=1</text>
 </g>
 <!-- DELAY_CMD0&#45;&gt;SEND_CMD8 -->
 <g id="edge8" class="edge">
 <title>DELAY_CMD0&#45;&gt;SEND_CMD8</title>
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 <!-- SEND_CMD8&#45;&gt;WAIT_CMD8 -->
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 <!-- WAIT_CMD8&#45;&gt;WAIT_CMD8 -->
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 <!-- WAIT_CMD8&#45;&gt;LISTEN_RESPONSE_CMD8 -->
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 <text text-anchor="middle" x="470" y="-4524.59" font-family="Times,serif" font-size="14.00">start=0</text>
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 <!-- SEND_CMD55&#45;&gt;WAIT_CMD55 -->
 <g id="edge15" class="edge">
 <title>SEND_CMD55&#45;&gt;WAIT_CMD55</title>
 <path fill="none" stroke="black" d="M550.93,-4614.2C536.38,-4600.66 520.36,-4585.75 506.44,-4572.8"/>
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 <!-- WAIT_CMD55&#45;&gt;WAIT_CMD55 -->
 <g id="edge16" class="edge">
 <title>WAIT_CMD55&#45;&gt;WAIT_CMD55</title>
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 <text text-anchor="middle" x="622.55" y="-4532.84" font-family="Times,serif" font-size="14.00">!send_command.ready</text>
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 <!-- LISTEN_RESPONSE_CMD55 -->
 <g id="node12" class="node">
 <title>LISTEN_RESPONSE_CMD55</title>
 <ellipse fill="none" stroke="black" cx="445" cy="-4415.74" rx="133.29" ry="40.66"/>
 <text text-anchor="middle" x="445" y="-4427.19" font-family="Times,serif" font-size="14.00">LISTEN_RESPONSE_CMD55</text>
 <text text-anchor="middle" x="445" y="-4410.69" font-family="Times,serif" font-size="14.00">response_type=1</text>
 <text text-anchor="middle" x="445" y="-4394.19" font-family="Times,serif" font-size="14.00">read_command.listen=1</text>
 </g>
 <!-- WAIT_CMD55&#45;&gt;LISTEN_RESPONSE_CMD55 -->
 <g id="edge17" class="edge">
 <title>WAIT_CMD55&#45;&gt;LISTEN_RESPONSE_CMD55</title>
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 <text text-anchor="middle" x="519.74" y="-4477.6" font-family="Times,serif" font-size="14.00">send_command.ready</text>
 </g>
 <!-- WAIT_RESPONSE_CMD55 -->
 <g id="node13" class="node">
 <title>WAIT_RESPONSE_CMD55</title>
 <ellipse fill="none" stroke="black" cx="407" cy="-4309.09" rx="124.8" ry="28.99"/>
 <text text-anchor="middle" x="407" y="-4312.29" font-family="Times,serif" font-size="14.00">WAIT_RESPONSE_CMD55</text>
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 </g>
 <!-- LISTEN_RESPONSE_CMD55&#45;&gt;WAIT_RESPONSE_CMD55 -->
 <g id="edge18" class="edge">
 <title>LISTEN_RESPONSE_CMD55&#45;&gt;WAIT_RESPONSE_CMD55</title>
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 <!-- WAIT_RESPONSE_CMD55&#45;&gt;WAIT_RESPONSE_CMD55 -->
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 <title>WAIT_RESPONSE_CMD55&#45;&gt;WAIT_RESPONSE_CMD55</title>
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 <text text-anchor="middle" x="619.18" y="-4304.04" font-family="Times,serif" font-size="14.00">!read_command.received</text>
 </g>
 <!-- SEND_ACMD41 -->
 <g id="node14" class="node">
 <title>SEND_ACMD41</title>
 <ellipse fill="none" stroke="black" cx="407" cy="-4175.27" rx="79.73" ry="52.33"/>
 <text text-anchor="middle" x="407" y="-4194.97" font-family="Times,serif" font-size="14.00">SEND_ACMD41</text>
 <text text-anchor="middle" x="407" y="-4178.47" font-family="Times,serif" font-size="14.00">cmd=41</text>
 <text text-anchor="middle" x="407" y="-4161.97" font-family="Times,serif" font-size="14.00">arg=0x40100000</text>
 <text text-anchor="middle" x="407" y="-4145.47" font-family="Times,serif" font-size="14.00">start=1</text>
 </g>
 <!-- WAIT_RESPONSE_CMD55&#45;&gt;SEND_ACMD41 -->
 <g id="edge20" class="edge">
 <title>WAIT_RESPONSE_CMD55&#45;&gt;SEND_ACMD41</title>
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 <text text-anchor="middle" x="474.13" y="-4248.8" font-family="Times,serif" font-size="14.00">read_command.received</text>
 </g>
 <!-- WAIT_ACMD41 -->
 <g id="node15" class="node">
 <title>WAIT_ACMD41</title>
 <ellipse fill="none" stroke="black" cx="407" cy="-4056.95" rx="79.2" ry="28.99"/>
 <text text-anchor="middle" x="407" y="-4060.15" font-family="Times,serif" font-size="14.00">WAIT_ACMD41</text>
 <text text-anchor="middle" x="407" y="-4043.65" font-family="Times,serif" font-size="14.00">start=0</text>
 </g>
 <!-- SEND_ACMD41&#45;&gt;WAIT_ACMD41 -->
 <g id="edge21" class="edge">
 <title>SEND_ACMD41&#45;&gt;WAIT_ACMD41</title>
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 <!-- WAIT_ACMD41&#45;&gt;WAIT_ACMD41 -->
 <g id="edge22" class="edge">
 <title>WAIT_ACMD41&#45;&gt;WAIT_ACMD41</title>
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 <text text-anchor="middle" x="566.45" y="-4051.9" font-family="Times,serif" font-size="14.00">!send_command.ready</text>
 </g>
 <!-- LISTEN_RESPONSE_ACMD41 -->
 <g id="node16" class="node">
 <title>LISTEN_RESPONSE_ACMD41</title>
 <ellipse fill="none" stroke="black" cx="405" cy="-3934.8" rx="140.18" ry="40.66"/>
 <text text-anchor="middle" x="405" y="-3946.25" font-family="Times,serif" font-size="14.00">LISTEN_RESPONSE_ACMD41</text>
 <text text-anchor="middle" x="405" y="-3929.75" font-family="Times,serif" font-size="14.00">response_type=3</text>
 <text text-anchor="middle" x="405" y="-3913.25" font-family="Times,serif" font-size="14.00">read_command.listen=1</text>
 </g>
 <!-- WAIT_ACMD41&#45;&gt;LISTEN_RESPONSE_ACMD41 -->
 <g id="edge23" class="edge">
 <title>WAIT_ACMD41&#45;&gt;LISTEN_RESPONSE_ACMD41</title>
 <path fill="none" stroke="black" d="M406.53,-4027.48C406.33,-4015.44 406.09,-4001.04 405.86,-3987.26"/>
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 <text text-anchor="middle" x="466.18" y="-3996.66" font-family="Times,serif" font-size="14.00">send_command.ready</text>
 </g>
 <!-- WAIT_RESPONSE_ACMD41 -->
 <g id="node17" class="node">
 <title>WAIT_RESPONSE_ACMD41</title>
 <ellipse fill="none" stroke="black" cx="401" cy="-3816.49" rx="131.7" ry="40.66"/>
 <text text-anchor="middle" x="401" y="-3827.94" font-family="Times,serif" font-size="14.00">WAIT_RESPONSE_ACMD41</text>
 <text text-anchor="middle" x="401" y="-3811.44" font-family="Times,serif" font-size="14.00">read_command.listen=0</text>
 <text text-anchor="middle" x="401" y="-3794.94" font-family="Times,serif" font-size="14.00">counter=100</text>
 </g>
 <!-- LISTEN_RESPONSE_ACMD41&#45;&gt;WAIT_RESPONSE_ACMD41 -->
 <g id="edge24" class="edge">
 <title>LISTEN_RESPONSE_ACMD41&#45;&gt;WAIT_RESPONSE_ACMD41</title>
 <path fill="none" stroke="black" d="M403.62,-3893.77C403.35,-3885.73 403.05,-3877.18 402.77,-3868.81"/>
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 <!-- WAIT_RESPONSE_ACMD41&#45;&gt;WAIT_RESPONSE_ACMD41 -->
 <g id="edge25" class="edge">
 <title>WAIT_RESPONSE_ACMD41&#45;&gt;WAIT_RESPONSE_ACMD41</title>
 <path fill="none" stroke="black" d="M529.82,-3825.53C542.58,-3823.72 550.7,-3820.7 550.7,-3816.49 550.7,-3813.65 547.04,-3811.36 540.76,-3809.62"/>
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 <text text-anchor="middle" x="620.07" y="-3811.44" font-family="Times,serif" font-size="14.00">!read_command.received</text>
 </g>
 <!-- ACMD41_DELAY -->
 <g id="node18" class="node">
 <title>ACMD41_DELAY</title>
 <ellipse fill="none" stroke="black" cx="590" cy="-3671" rx="87.15" ry="28.99"/>
 <text text-anchor="middle" x="590" y="-3674.2" font-family="Times,serif" font-size="14.00">ACMD41_DELAY</text>
 <text text-anchor="middle" x="590" y="-3657.7" font-family="Times,serif" font-size="14.00">counter&#45;&#45;</text>
 </g>
 <!-- WAIT_RESPONSE_ACMD41&#45;&gt;ACMD41_DELAY -->
 <g id="edge26" class="edge">
 <title>WAIT_RESPONSE_ACMD41&#45;&gt;ACMD41_DELAY</title>
 <path fill="none" stroke="black" d="M430.37,-3776.49C440.6,-3764.37 452.69,-3751.53 465.25,-3741.33 484.68,-3725.55 508.19,-3711.43 529.55,-3700.12"/>
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 <text text-anchor="middle" x="584.13" y="-3744.53" font-family="Times,serif" font-size="14.00">read_command.received &amp;&amp; !out_data[39]</text>
 </g>
 <!-- SEND_CMD2 -->
 <g id="node19" class="node">
 <title>SEND_CMD2</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-3671" rx="102" ry="52.33"/>
 <text text-anchor="middle" x="208" y="-3690.7" font-family="Times,serif" font-size="14.00">SEND_CMD2</text>
 <text text-anchor="middle" x="208" y="-3674.2" font-family="Times,serif" font-size="14.00">cmd=2</text>
 <text text-anchor="middle" x="208" y="-3657.7" font-family="Times,serif" font-size="14.00">arg=0</text>
 <text text-anchor="middle" x="208" y="-3641.2" font-family="Times,serif" font-size="14.00">send_command.start=1</text>
 </g>
 <!-- WAIT_RESPONSE_ACMD41&#45;&gt;SEND_CMD2 -->
 <g id="edge29" class="edge">
 <title>WAIT_RESPONSE_ACMD41&#45;&gt;SEND_CMD2</title>
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 <text text-anchor="middle" x="326.38" y="-3744.53" font-family="Times,serif" font-size="14.00">read_command.received &amp;&amp; out_data[39]</text>
 </g>
 <!-- ACMD41_DELAY&#45;&gt;SEND_CMD55 -->
 <g id="edge28" class="edge">
 <title>ACMD41_DELAY&#45;&gt;SEND_CMD55</title>
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 <text text-anchor="middle" x="748.88" y="-4170.22" font-family="Times,serif" font-size="14.00">counter==0</text>
 </g>
 <!-- ACMD41_DELAY&#45;&gt;ACMD41_DELAY -->
 <g id="edge27" class="edge">
 <title>ACMD41_DELAY&#45;&gt;ACMD41_DELAY</title>
 <path fill="none" stroke="black" d="M668.87,-3683.69C684.24,-3682.22 695.15,-3677.99 695.15,-3671 695.15,-3665.87 689.27,-3662.23 680.05,-3660.07"/>
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 <text text-anchor="middle" x="725.15" y="-3665.95" font-family="Times,serif" font-size="14.00">counter!=0</text>
 </g>
 <!-- WAIT_CMD2 -->
 <g id="node20" class="node">
 <title>WAIT_CMD2</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-3552.69" rx="102" ry="28.99"/>
 <text text-anchor="middle" x="208" y="-3555.89" font-family="Times,serif" font-size="14.00">WAIT_CMD2</text>
 <text text-anchor="middle" x="208" y="-3539.39" font-family="Times,serif" font-size="14.00">send_command.start=0</text>
 </g>
 <!-- SEND_CMD2&#45;&gt;WAIT_CMD2 -->
 <g id="edge30" class="edge">
 <title>SEND_CMD2&#45;&gt;WAIT_CMD2</title>
 <path fill="none" stroke="black" d="M208,-3618.31C208,-3609.91 208,-3601.33 208,-3593.28"/>
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 <!-- WAIT_CMD2&#45;&gt;WAIT_CMD2 -->
 <g id="edge31" class="edge">
 <title>WAIT_CMD2&#45;&gt;WAIT_CMD2</title>
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 </g>
 <!-- LISTEN_RESPONSE_CMD2 -->
 <g id="node21" class="node">
 <title>LISTEN_RESPONSE_CMD2</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-3430.54" rx="128.52" ry="40.66"/>
 <text text-anchor="middle" x="208" y="-3441.99" font-family="Times,serif" font-size="14.00">LISTEN_RESPONSE_CMD2</text>
 <text text-anchor="middle" x="208" y="-3425.49" font-family="Times,serif" font-size="14.00">response_type=2</text>
 <text text-anchor="middle" x="208" y="-3408.99" font-family="Times,serif" font-size="14.00">read_command.listen=1</text>
 </g>
 <!-- WAIT_CMD2&#45;&gt;LISTEN_RESPONSE_CMD2 -->
 <g id="edge32" class="edge">
 <title>WAIT_CMD2&#45;&gt;LISTEN_RESPONSE_CMD2</title>
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 </g>
 <!-- WAIT_RESPONSE_CMD2 -->
 <g id="node22" class="node">
 <title>WAIT_RESPONSE_CMD2</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-3323.89" rx="120.03" ry="28.99"/>
 <text text-anchor="middle" x="208" y="-3327.09" font-family="Times,serif" font-size="14.00">WAIT_RESPONSE_CMD2</text>
 <text text-anchor="middle" x="208" y="-3310.59" font-family="Times,serif" font-size="14.00">read_command.listen=0</text>
 </g>
 <!-- LISTEN_RESPONSE_CMD2&#45;&gt;WAIT_RESPONSE_CMD2 -->
 <g id="edge33" class="edge">
 <title>LISTEN_RESPONSE_CMD2&#45;&gt;WAIT_RESPONSE_CMD2</title>
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 <!-- WAIT_RESPONSE_CMD2&#45;&gt;WAIT_RESPONSE_CMD2 -->
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 <title>WAIT_RESPONSE_CMD2&#45;&gt;WAIT_RESPONSE_CMD2</title>
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 <!-- SEND_CMD3 -->
 <g id="node23" class="node">
 <title>SEND_CMD3</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-3190.07" rx="102" ry="52.33"/>
 <text text-anchor="middle" x="208" y="-3209.77" font-family="Times,serif" font-size="14.00">SEND_CMD3</text>
 <text text-anchor="middle" x="208" y="-3193.27" font-family="Times,serif" font-size="14.00">cmd=3</text>
 <text text-anchor="middle" x="208" y="-3176.77" font-family="Times,serif" font-size="14.00">arg=0</text>
 <text text-anchor="middle" x="208" y="-3160.27" font-family="Times,serif" font-size="14.00">send_command.start=1</text>
 </g>
 <!-- WAIT_RESPONSE_CMD2&#45;&gt;SEND_CMD3 -->
 <g id="edge35" class="edge">
 <title>WAIT_RESPONSE_CMD2&#45;&gt;SEND_CMD3</title>
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 <text text-anchor="middle" x="275.13" y="-3263.59" font-family="Times,serif" font-size="14.00">read_command.received</text>
 </g>
 <!-- WAIT_CMD3 -->
 <g id="node24" class="node">
 <title>WAIT_CMD3</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-3071.75" rx="102" ry="28.99"/>
 <text text-anchor="middle" x="208" y="-3074.95" font-family="Times,serif" font-size="14.00">WAIT_CMD3</text>
 <text text-anchor="middle" x="208" y="-3058.45" font-family="Times,serif" font-size="14.00">send_command.start=0</text>
 </g>
 <!-- SEND_CMD3&#45;&gt;WAIT_CMD3 -->
 <g id="edge36" class="edge">
 <title>SEND_CMD3&#45;&gt;WAIT_CMD3</title>
 <path fill="none" stroke="black" d="M208,-3137.37C208,-3128.97 208,-3120.39 208,-3112.34"/>
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 <!-- WAIT_CMD3&#45;&gt;WAIT_CMD3 -->
 <g id="edge37" class="edge">
 <title>WAIT_CMD3&#45;&gt;WAIT_CMD3</title>
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 </g>
 <!-- LISTEN_RESPONSE_CMD3 -->
 <g id="node25" class="node">
 <title>LISTEN_RESPONSE_CMD3</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-2949.6" rx="128.52" ry="40.66"/>
 <text text-anchor="middle" x="208" y="-2961.05" font-family="Times,serif" font-size="14.00">LISTEN_RESPONSE_CMD3</text>
 <text text-anchor="middle" x="208" y="-2944.55" font-family="Times,serif" font-size="14.00">response_type=6</text>
 <text text-anchor="middle" x="208" y="-2928.05" font-family="Times,serif" font-size="14.00">read_command.listen=1</text>
 </g>
 <!-- WAIT_CMD3&#45;&gt;LISTEN_RESPONSE_CMD3 -->
 <g id="edge38" class="edge">
 <title>WAIT_CMD3&#45;&gt;LISTEN_RESPONSE_CMD3</title>
 <path fill="none" stroke="black" d="M208,-3042.28C208,-3030.24 208,-3015.84 208,-3002.06"/>
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 <text text-anchor="middle" x="268" y="-3011.46" font-family="Times,serif" font-size="14.00">send_command.ready</text>
 </g>
 <!-- WAIT_RESPONSE_CMD3 -->
 <g id="node26" class="node">
 <title>WAIT_RESPONSE_CMD3</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-2842.95" rx="120.03" ry="28.99"/>
 <text text-anchor="middle" x="208" y="-2846.15" font-family="Times,serif" font-size="14.00">WAIT_RESPONSE_CMD3</text>
 <text text-anchor="middle" x="208" y="-2829.65" font-family="Times,serif" font-size="14.00">read_command.listen=0</text>
 </g>
 <!-- LISTEN_RESPONSE_CMD3&#45;&gt;WAIT_RESPONSE_CMD3 -->
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 <title>LISTEN_RESPONSE_CMD3&#45;&gt;WAIT_RESPONSE_CMD3</title>
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 <!-- WAIT_RESPONSE_CMD3&#45;&gt;WAIT_RESPONSE_CMD3 -->
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 <text text-anchor="middle" x="415.41" y="-2837.9" font-family="Times,serif" font-size="14.00">!read_command.received</text>
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 <!-- SEND_CMD7 -->
 <g id="node27" class="node">
 <title>SEND_CMD7</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-2709.13" rx="137.53" ry="52.33"/>
 <text text-anchor="middle" x="208" y="-2728.83" font-family="Times,serif" font-size="14.00">SEND_CMD7</text>
 <text text-anchor="middle" x="208" y="-2712.33" font-family="Times,serif" font-size="14.00">cmd=7</text>
 <text text-anchor="middle" x="208" y="-2695.83" font-family="Times,serif" font-size="14.00">arg={out_data[39:24],16&#39;h0000}</text>
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 <!-- WAIT_RESPONSE_CMD3&#45;&gt;SEND_CMD7 -->
 <g id="edge41" class="edge">
 <title>WAIT_RESPONSE_CMD3&#45;&gt;SEND_CMD7</title>
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 <!-- WAIT_CMD7 -->
 <g id="node28" class="node">
 <title>WAIT_CMD7</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-2590.82" rx="102" ry="28.99"/>
 <text text-anchor="middle" x="208" y="-2594.02" font-family="Times,serif" font-size="14.00">WAIT_CMD7</text>
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 <!-- SEND_CMD7&#45;&gt;WAIT_CMD7 -->
 <g id="edge42" class="edge">
 <title>SEND_CMD7&#45;&gt;WAIT_CMD7</title>
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 <!-- WAIT_CMD7&#45;&gt;WAIT_CMD7 -->
 <g id="edge43" class="edge">
 <title>WAIT_CMD7&#45;&gt;WAIT_CMD7</title>
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 <text text-anchor="middle" x="390.25" y="-2585.77" font-family="Times,serif" font-size="14.00">!send_command.ready</text>
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 <!-- LISTEN_RESPONSE_CMD7 -->
 <g id="node29" class="node">
 <title>LISTEN_RESPONSE_CMD7</title>
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 <text text-anchor="middle" x="208" y="-2480.12" font-family="Times,serif" font-size="14.00">LISTEN_RESPONSE_CMD7</text>
 <text text-anchor="middle" x="208" y="-2463.62" font-family="Times,serif" font-size="14.00">response_type=1</text>
 <text text-anchor="middle" x="208" y="-2447.12" font-family="Times,serif" font-size="14.00">read_command.listen=1</text>
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 <!-- WAIT_CMD7&#45;&gt;LISTEN_RESPONSE_CMD7 -->
 <g id="edge44" class="edge">
 <title>WAIT_CMD7&#45;&gt;LISTEN_RESPONSE_CMD7</title>
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 <text text-anchor="middle" x="268" y="-2530.52" font-family="Times,serif" font-size="14.00">send_command.ready</text>
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 <!-- WAIT_RESPONSE_CMD7 -->
 <g id="node30" class="node">
 <title>WAIT_RESPONSE_CMD7</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-2362.02" rx="120.03" ry="28.99"/>
 <text text-anchor="middle" x="208" y="-2365.22" font-family="Times,serif" font-size="14.00">WAIT_RESPONSE_CMD7</text>
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 <!-- LISTEN_RESPONSE_CMD7&#45;&gt;WAIT_RESPONSE_CMD7 -->
 <g id="edge45" class="edge">
 <title>LISTEN_RESPONSE_CMD7&#45;&gt;WAIT_RESPONSE_CMD7</title>
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 <!-- WAIT_RESPONSE_CMD7&#45;&gt;WAIT_RESPONSE_CMD7 -->
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 <title>WAIT_RESPONSE_CMD7&#45;&gt;WAIT_RESPONSE_CMD7</title>
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 <text text-anchor="middle" x="407.53" y="-2356.97" font-family="Times,serif" font-size="14.00">!read_command.ready</text>
 </g>
 <!-- SEND2_CMD55 -->
 <g id="node31" class="node">
 <title>SEND2_CMD55</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-2239.87" rx="77.6" ry="40.66"/>
 <text text-anchor="middle" x="208" y="-2251.32" font-family="Times,serif" font-size="14.00">SEND2_CMD55</text>
 <text text-anchor="middle" x="208" y="-2234.82" font-family="Times,serif" font-size="14.00">cmd=55</text>
 <text text-anchor="middle" x="208" y="-2218.32" font-family="Times,serif" font-size="14.00">start=1</text>
 </g>
 <!-- WAIT_RESPONSE_CMD7&#45;&gt;SEND2_CMD55 -->
 <g id="edge47" class="edge">
 <title>WAIT_RESPONSE_CMD7&#45;&gt;SEND2_CMD55</title>
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 <text text-anchor="middle" x="275.13" y="-2301.72" font-family="Times,serif" font-size="14.00">read_command.received</text>
 </g>
 <!-- WAIT2_CMD55 -->
 <g id="node32" class="node">
 <title>WAIT2_CMD55</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-2133.22" rx="77.07" ry="28.99"/>
 <text text-anchor="middle" x="208" y="-2136.42" font-family="Times,serif" font-size="14.00">WAIT2_CMD55</text>
 <text text-anchor="middle" x="208" y="-2119.92" font-family="Times,serif" font-size="14.00">start=0</text>
 </g>
 <!-- SEND2_CMD55&#45;&gt;WAIT2_CMD55 -->
 <g id="edge48" class="edge">
 <title>SEND2_CMD55&#45;&gt;WAIT2_CMD55</title>
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 <!-- WAIT2_CMD55&#45;&gt;WAIT2_CMD55 -->
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 <title>WAIT2_CMD55&#45;&gt;WAIT2_CMD55</title>
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 <!-- LISTEN_RESPONSE2_CMD55 -->
 <g id="node33" class="node">
 <title>LISTEN_RESPONSE2_CMD55</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-2011.07" rx="138.06" ry="40.66"/>
 <text text-anchor="middle" x="208" y="-2022.52" font-family="Times,serif" font-size="14.00">LISTEN_RESPONSE2_CMD55</text>
 <text text-anchor="middle" x="208" y="-2006.02" font-family="Times,serif" font-size="14.00">response_type=1</text>
 <text text-anchor="middle" x="208" y="-1989.52" font-family="Times,serif" font-size="14.00">read_command.listen=1</text>
 </g>
 <!-- WAIT2_CMD55&#45;&gt;LISTEN_RESPONSE2_CMD55 -->
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 <title>WAIT2_CMD55&#45;&gt;LISTEN_RESPONSE2_CMD55</title>
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 <!-- WAIT_RESPONSE2_CMD55 -->
 <g id="node34" class="node">
 <title>WAIT_RESPONSE2_CMD55</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-1904.42" rx="129.58" ry="28.99"/>
 <text text-anchor="middle" x="208" y="-1907.62" font-family="Times,serif" font-size="14.00">WAIT_RESPONSE2_CMD55</text>
 <text text-anchor="middle" x="208" y="-1891.12" font-family="Times,serif" font-size="14.00">read_command.listen=0</text>
 </g>
 <!-- LISTEN_RESPONSE2_CMD55&#45;&gt;WAIT_RESPONSE2_CMD55 -->
 <g id="edge51" class="edge">
 <title>LISTEN_RESPONSE2_CMD55&#45;&gt;WAIT_RESPONSE2_CMD55</title>
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 <!-- WAIT_RESPONSE2_CMD55&#45;&gt;WAIT_RESPONSE2_CMD55 -->
 <g id="edge52" class="edge">
 <title>WAIT_RESPONSE2_CMD55&#45;&gt;WAIT_RESPONSE2_CMD55</title>
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 </g>
 <!-- SEND_ACMD6 -->
 <g id="node35" class="node">
 <title>SEND_ACMD6</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-1770.6" rx="77.07" ry="52.33"/>
 <text text-anchor="middle" x="208" y="-1790.3" font-family="Times,serif" font-size="14.00">SEND_ACMD6</text>
 <text text-anchor="middle" x="208" y="-1773.8" font-family="Times,serif" font-size="14.00">cmd=6</text>
 <text text-anchor="middle" x="208" y="-1757.3" font-family="Times,serif" font-size="14.00">arg=0x00000002</text>
 <text text-anchor="middle" x="208" y="-1740.8" font-family="Times,serif" font-size="14.00">start=1</text>
 </g>
 <!-- WAIT_RESPONSE2_CMD55&#45;&gt;SEND_ACMD6 -->
 <g id="edge53" class="edge">
 <title>WAIT_RESPONSE2_CMD55&#45;&gt;SEND_ACMD6</title>
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 </g>
 <!-- WAIT_ACMD6 -->
 <g id="node36" class="node">
 <title>WAIT_ACMD6</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-1652.28" rx="74.42" ry="28.99"/>
 <text text-anchor="middle" x="208" y="-1655.48" font-family="Times,serif" font-size="14.00">WAIT_ACMD6</text>
 <text text-anchor="middle" x="208" y="-1638.98" font-family="Times,serif" font-size="14.00">start=0</text>
 </g>
 <!-- SEND_ACMD6&#45;&gt;WAIT_ACMD6 -->
 <g id="edge54" class="edge">
 <title>SEND_ACMD6&#45;&gt;WAIT_ACMD6</title>
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 <!-- WAIT_ACMD6&#45;&gt;WAIT_ACMD6 -->
 <g id="edge55" class="edge">
 <title>WAIT_ACMD6&#45;&gt;WAIT_ACMD6</title>
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 <!-- LISTEN_RESPONSE_ACMD6 -->
 <g id="node37" class="node">
 <title>LISTEN_RESPONSE_ACMD6</title>
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 <text text-anchor="middle" x="208" y="-1541.58" font-family="Times,serif" font-size="14.00">LISTEN_RESPONSE_ACMD6</text>
 <text text-anchor="middle" x="208" y="-1525.08" font-family="Times,serif" font-size="14.00">response_type=1</text>
 <text text-anchor="middle" x="208" y="-1508.58" font-family="Times,serif" font-size="14.00">read_command.listen=1</text>
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 <!-- WAIT_ACMD6&#45;&gt;LISTEN_RESPONSE_ACMD6 -->
 <g id="edge56" class="edge">
 <title>WAIT_ACMD6&#45;&gt;LISTEN_RESPONSE_ACMD6</title>
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 <!-- WAIT_RESPONSE_ACMD6 -->
 <g id="node38" class="node">
 <title>WAIT_RESPONSE_ACMD6</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-1411.81" rx="126.93" ry="40.66"/>
 <text text-anchor="middle" x="208" y="-1423.26" font-family="Times,serif" font-size="14.00">WAIT_RESPONSE_ACMD6</text>
 <text text-anchor="middle" x="208" y="-1406.76" font-family="Times,serif" font-size="14.00">read_command.listen=0</text>
 <text text-anchor="middle" x="208" y="-1390.26" font-family="Times,serif" font-size="14.00">counter=100</text>
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 <!-- LISTEN_RESPONSE_ACMD6&#45;&gt;WAIT_RESPONSE_ACMD6 -->
 <g id="edge57" class="edge">
 <title>LISTEN_RESPONSE_ACMD6&#45;&gt;WAIT_RESPONSE_ACMD6</title>
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 <!-- WAIT_RESPONSE_ACMD6&#45;&gt;WAIT_RESPONSE_ACMD6 -->
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 <title>WAIT_RESPONSE_ACMD6&#45;&gt;WAIT_RESPONSE_ACMD6</title>
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 <!-- READY_TO_TRANSMIT -->
 <g id="node39" class="node">
 <title>READY_TO_TRANSMIT</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-1254.66" rx="115.79" ry="63.99"/>
 <text text-anchor="middle" x="208" y="-1282.61" font-family="Times,serif" font-size="14.00">READY_TO_TRANSMIT</text>
 <text text-anchor="middle" x="208" y="-1266.11" font-family="Times,serif" font-size="14.00">clk_source=fast</text>
 <text text-anchor="middle" x="208" y="-1249.61" font-family="Times,serif" font-size="14.00">address=0</text>
 <text text-anchor="middle" x="208" y="-1233.11" font-family="Times,serif" font-size="14.00">buffer_half=0</text>
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 <!-- WAIT_RESPONSE_ACMD6&#45;&gt;READY_TO_TRANSMIT -->
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 <!-- DELAY_CLOCK_SWITCH -->
 <g id="node40" class="node">
 <title>DELAY_CLOCK_SWITCH</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-1124.68" rx="122.68" ry="28.99"/>
 <text text-anchor="middle" x="208" y="-1127.88" font-family="Times,serif" font-size="14.00">DELAY_CLOCK_SWITCH</text>
 <text text-anchor="middle" x="208" y="-1111.38" font-family="Times,serif" font-size="14.00">counter&#45;&#45;</text>
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 <!-- READY_TO_TRANSMIT&#45;&gt;DELAY_CLOCK_SWITCH -->
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 <title>READY_TO_TRANSMIT&#45;&gt;DELAY_CLOCK_SWITCH</title>
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 <!-- DELAY_CLOCK_SWITCH&#45;&gt;DELAY_CLOCK_SWITCH -->
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 <title>DELAY_CLOCK_SWITCH&#45;&gt;DELAY_CLOCK_SWITCH</title>
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 <!-- TRANSMIT -->
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 <title>TRANSMIT</title>
 <ellipse fill="none" stroke="black" cx="208" cy="-990.86" rx="102" ry="52.33"/>
 <text text-anchor="middle" x="208" y="-1010.56" font-family="Times,serif" font-size="14.00">TRANSMIT</text>
 <text text-anchor="middle" x="208" y="-994.06" font-family="Times,serif" font-size="14.00">cmd=17</text>
 <text text-anchor="middle" x="208" y="-977.56" font-family="Times,serif" font-size="14.00">arg=address</text>
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 <!-- DELAY_CLOCK_SWITCH&#45;&gt;TRANSMIT -->
 <g id="edge61" class="edge">
 <title>DELAY_CLOCK_SWITCH&#45;&gt;TRANSMIT</title>
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 <!-- WAIT_TRANSMIT -->
 <g id="node42" class="node">
 <title>WAIT_TRANSMIT</title>
 <ellipse fill="none" stroke="black" cx="102" cy="-860.88" rx="102" ry="40.66"/>
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 <text text-anchor="middle" x="102" y="-855.83" font-family="Times,serif" font-size="14.00">send_command.start=0</text>
 <text text-anchor="middle" x="102" y="-839.33" font-family="Times,serif" font-size="14.00">counter=4114</text>
 </g>
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 <g id="edge63" class="edge">
 <title>TRANSMIT&#45;&gt;WAIT_TRANSMIT</title>
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 <!-- WAIT_TRANSMIT&#45;&gt;WAIT_TRANSMIT -->
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 <title>WAIT_TRANSMIT&#45;&gt;WAIT_TRANSMIT</title>
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 <text text-anchor="middle" x="254.25" y="-855.83" font-family="Times,serif" font-size="14.00">sd_data==1</text>
 </g>
 <!-- WAIT_END -->
 <g id="node43" class="node">
 <title>WAIT_END</title>
 <ellipse fill="none" stroke="black" cx="102" cy="-738.73" rx="60.1" ry="28.99"/>
 <text text-anchor="middle" x="102" y="-741.93" font-family="Times,serif" font-size="14.00">WAIT_END</text>
 <text text-anchor="middle" x="102" y="-725.43" font-family="Times,serif" font-size="14.00">counter&#45;&#45;</text>
 </g>
 <!-- WAIT_TRANSMIT&#45;&gt;WAIT_END -->
 <g id="edge65" class="edge">
 <title>WAIT_TRANSMIT&#45;&gt;WAIT_END</title>
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 <text text-anchor="middle" x="134.25" y="-788.92" font-family="Times,serif" font-size="14.00">sd_data==0</text>
 </g>
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 <g id="edge66" class="edge">
 <title>WAIT_END&#45;&gt;WAIT_END</title>
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 <text text-anchor="middle" x="210.1" y="-733.68" font-family="Times,serif" font-size="14.00">counter!=0</text>
 </g>
 <!-- FINISH_TRANSMIT -->
 <g id="node44" class="node">
 <title>FINISH_TRANSMIT</title>
 <ellipse fill="none" stroke="black" cx="102" cy="-628.24" rx="96.17" ry="28.99"/>
 <text text-anchor="middle" x="102" y="-631.44" font-family="Times,serif" font-size="14.00">FINISH_TRANSMIT</text>
 <text text-anchor="middle" x="102" y="-614.94" font-family="Times,serif" font-size="14.00">address++</text>
 </g>
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 <g id="edge67" class="edge">
 <title>WAIT_END&#45;&gt;FINISH_TRANSMIT</title>
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 <text text-anchor="middle" x="133.88" y="-678.43" font-family="Times,serif" font-size="14.00">counter==0</text>
 </g>
 <!-- TRANSMIT2 -->
 <g id="node45" class="node">
 <title>TRANSMIT2</title>
 <ellipse fill="none" stroke="black" cx="102" cy="-509.93" rx="102" ry="52.33"/>
 <text text-anchor="middle" x="102" y="-529.63" font-family="Times,serif" font-size="14.00">TRANSMIT2</text>
 <text text-anchor="middle" x="102" y="-513.13" font-family="Times,serif" font-size="14.00">cmd=17</text>
 <text text-anchor="middle" x="102" y="-496.63" font-family="Times,serif" font-size="14.00">arg=address</text>
 <text text-anchor="middle" x="102" y="-480.13" font-family="Times,serif" font-size="14.00">send_command.start=1</text>
 </g>
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 <title>FINISH_TRANSMIT&#45;&gt;TRANSMIT2</title>
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 <!-- WAIT_TRANSMIT2 -->
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 <title>WAIT_TRANSMIT2</title>
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 <text text-anchor="middle" x="102" y="-374.89" font-family="Times,serif" font-size="14.00">send_command.start=0</text>
 <text text-anchor="middle" x="102" y="-358.39" font-family="Times,serif" font-size="14.00">counter=4114</text>
 </g>
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 <title>TRANSMIT2&#45;&gt;WAIT_TRANSMIT2</title>
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 <polygon fill="black" stroke="black" points="105.5,-432.52 102,-422.52 98.5,-432.52 105.5,-432.52"/>
 </g>
 <!-- WAIT_TRANSMIT2&#45;&gt;WAIT_TRANSMIT2 -->
 <g id="edge70" class="edge">
 <title>WAIT_TRANSMIT2&#45;&gt;WAIT_TRANSMIT2</title>
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 <text text-anchor="middle" x="254.25" y="-374.89" font-family="Times,serif" font-size="14.00">sd_data==1</text>
 </g>
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 <g id="node47" class="node">
 <title>WAIT_END2</title>
 <ellipse fill="none" stroke="black" cx="111" cy="-257.79" rx="64.88" ry="28.99"/>
 <text text-anchor="middle" x="111" y="-260.99" font-family="Times,serif" font-size="14.00">WAIT_END2</text>
 <text text-anchor="middle" x="111" y="-244.49" font-family="Times,serif" font-size="14.00">counter&#45;&#45;</text>
 </g>
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 <title>WAIT_TRANSMIT2&#45;&gt;WAIT_END2</title>
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 <text text-anchor="middle" x="139.56" y="-307.98" font-family="Times,serif" font-size="14.00">sd_data==0</text>
 </g>
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 <title>WAIT_END2&#45;&gt;WAIT_END2</title>
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 <title>FINISH_TRANSMIT2</title>
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 <title>WAIT_FOR_BUFFER</title>
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@@ -0,0 +1,23 @@
 digraph send_command {
    READY [shape="doublecircle",label="READY\ncounter=48\nready"]
    node [shape="ellipse"]
    SEND_CRC [label="SEND_CRC\n!ready\ncrc_start=1\nto_send={2'b01,command,arguments,8'b1}"]
    DELAY [label="DELAY\ncrc_start=0"]
    WAIT_CRC [label="WAIT_CRC\nto_send[7:1]=crc"]
    SEND_DATA [label="SEND_DATA\ncounter--\nsend_sd_cmd=to_send[counter-1]"]
    READY -> READY [label="!start"]
    READY -> SEND_CRC [label="start"]
    SEND_CRC -> DELAY;
    DELAY -> WAIT_CRC;
    WAIT_CRC -> WAIT_CRC [label="!crc_ready"]
    WAIT_CRC -> SEND_DATA [label="crc_ready"]
    SEND_DATA -> SEND_DATA [label="counter!=1"]
    SEND_DATA -> READY [label="counter==0"]
 }
@@ -2,6 +2,6 @@
 `define SDVD_DEFS
 package sdvd_defs;
    // Playback speed type
-    typedef logic [3:0] SPEED;
+    typedef logic [4:0] SPEED;
 endpackage
 `endif
@@ -10,29 +10,22 @@ module audio_buffer_tb;
    logic play, stop;
    SPEED speed;
    // Whether the current address being read from is in the upper or lower
    // half of the 2KiB buffer
    logic address_half;
    // Whether the audio buffer is currently playing
    logic playing;
    // A 16-bit audio sample to output
    logic [15:0] sample;
    // Inputs for the memory buffer
    logic [10:0] addra;
    logic [7:0] dina;
    logic clka, ena;
    logic [9:0] counter;
    logic [15:0] test_memory [1023:0];
-    audio_buffer dut(.*);
+
    audio_buffer_interface buffer();
    audio_buffer dut(.driver(buffer),.*);
    // The writer's clock should be much faster than the 48khz buffer clock
-    initial clka = 0;
+    initial buffer.clka = 0;
-    always #5 clka = ~clka;
+    always #5 buffer.clka = ~buffer.clka;
    // An order of magnitude difference is fine
@@ -83,38 +76,38 @@ module audio_buffer_tb;
        end
        // Writer
        begin
-            ena = 1;
+            buffer.ena = 1;
            for (int i = 0; i<= 1024; i++) begin
-                addra = i*2;
+                buffer.addra = i*2;
-                dina = i[7:0];
+                buffer.dina = i[7:0];
-                @(posedge clka)
+                @(posedge buffer.clka)
-                addra = i*2+1;
+                buffer.addra = i*2+1;
-                dina = i[15:8];
+                buffer.dina = i[15:8];
-                @(posedge clka);
+                @(posedge buffer.clka);
            end
-            wait (address_half==1);
+            wait (buffer.address_half==1);
            // random test, write to lower half of memory
            for (int i = 0; i< 512; i++) begin
-                addra = i*2;
+                buffer.addra = i*2;
-                dina = $urandom;
+                buffer.dina = $urandom;
-                test_memory[i][7:0] = dina;
+                test_memory[i][7:0] = buffer.dina;
-                @(posedge clka)
+                @(posedge buffer.clka)
-                addra = i*2+1;
+                buffer.addra = i*2+1;
-                dina = $urandom;
+                buffer.dina = $urandom;
-                test_memory[i][15:8] = dina;
+                test_memory[i][15:8] = buffer.dina;
-                @(posedge clka);
+                @(posedge buffer.clka);
            end
-            wait (address_half==0);
+            wait (buffer.address_half==0);
            // random test, write to upper half of memory
            for (int i = 512; i< 1024; i++) begin
-                addra = i*2;
+                buffer.addra = i*2;
-                dina = $urandom;
+                buffer.dina = $urandom;
-                test_memory[i][7:0] = dina;
+                test_memory[i][7:0] = buffer.dina;
-                @(posedge clka)
+                @(posedge buffer.clka)
-                addra = i*2+1;
+                buffer.addra = i*2+1;
-                dina = $urandom;
+                buffer.dina = $urandom;
-                test_memory[i][15:8] = dina;
+                test_memory[i][15:8] = buffer.dina;
-                @(posedge clka);
+                @(posedge buffer.clka);
            end
        end
        join
@@ -12,7 +12,7 @@ module pwm_tb;
    wire pwm_pin;
    logic [15:0] sample;
-    pwm dut (.*);
+    pwm #(16) dut (.*);
    initial forever #10 clk = ~clk;
@@ -60,6 +60,9 @@ initial begin
        errors++;
    end
    @(posedge clk);
    @(posedge clk);
    $display("Generating random input to test assertions");
    for (int i=0; i<TESTCYCLES; i++) begin
        source = $urandom;
@@ -16,7 +16,7 @@ module read_data_tb;
    // A 16-bit audio sample to output
    logic [15:0] sample;
-    logic sd_data;
+    logic [3:0] sd_data;
    audio_buffer_interface bufferInterface(); 
@@ -104,37 +104,41 @@ module read_data_tb;
    end
    task automatic write_random_sd(int start);
        @(posedge sd_clk);
-        sd_data = 1;
+        sd_data = '1;
        // send start bit
        @(posedge sd_clk);
        // send 256 data bits
        sd_data = 0;
        for (int i = 0; i < 256; i++) begin
-            write_byte(test_memory[start+i][7:0]);
+            write_byte(test_memory[start-i-1][7:0]);
-            write_byte(test_memory[start+i][15:8]);
+            write_byte(test_memory[start-i-1][15:8]);
        end
        // Simulate randomized crc bits and stop bit
-        repeat (16) @(posedge sd_clk) sd_data=$urandom;
+        repeat (16*4) @(posedge sd_clk) sd_data=$urandom;
-        @(posedge sd_clk) sd_data=1;
+        @(posedge sd_clk) sd_data='1;
    endtask
    task automatic write_linear_sd(int start);
        @(posedge sd_clk);
-        sd_data = 1;
+        sd_data = '1;
        // send start bit
        @(posedge sd_clk);
        // send 256 data bits
        sd_data = 0;
        start += 256;
        for (int i = 0; i < 256; i++) begin
            // NOTE: These are in the wrong order??
            //       One of the weird cases where simulation is different
            //       than hardware
            write_byte(start[7:0]);
            write_byte(start[15:8]);
-            start = start+1;
+            start = start-1;
        end
        // Simulate crc bits and stop bit
-        repeat (17) @(posedge sd_clk) sd_data=1;
+        repeat (16*4+1) @(posedge sd_clk) sd_data='1;
    endtask
    task automatic write_byte(logic [7:0] b);
-        for (int i=0; i<8; i++)
+        @(posedge sd_clk) sd_data=b[7:4];
-            @(posedge sd_clk) sd_data=b[7-i];
+        @(posedge sd_clk) sd_data=b[3:0];
    endtask
 endmodule
@@ -40,6 +40,7 @@ initial begin
    counter = 48;
    @(posedge clk);
    start = 0;
    // Try receiving the CMD8
    while (counter != 0) begin
@@ -54,9 +55,11 @@ initial begin
    assert (fill_me === {2'b01, 6'd8, 32'h1AA, 8'h87})
        else $error("Received wrong command, got 0x%x",fill_me);
    repeat (1) @(posedge clk);
    assert (ready)
        else $error("SD command sender not ready");
    repeat (10) @(posedge clk);
    $finish;
 end
@@ -16,7 +16,7 @@ wire [6:0] display_ones;
 logic [6:0] expected_tens;
 logic [6:0] expected_ones;
-seconds_display Dut(.*);
+sixty_display Dut(.number(seconds),.*);
 initial begin
    $display("Testing seconds_display");
    for (seconds=0; seconds<60; seconds++) begin
Author	SHA1	Message	Date
uelen	39894196dd	Add verification section to design.pdf ci/woodpecker/push/test-workflow Pipeline was successful Details	2025-06-12 20:20:06 -07:00
uelen	d4d890f0ea	Update design doc ci/woodpecker/push/test-workflow Pipeline was successful Details	2025-06-12 20:07:05 -07:00
uelen	180857bb39	Add design document ci/woodpecker/push/test-workflow Pipeline was successful Details	2025-06-11 22:50:03 -07:00
uelen	43573f5d8f	Added a few more demos and one last attempt ci/woodpecker/push/test-workflow Pipeline was successful Details at audio fixup. It did nothing of course lol Reverted back to 16-bit pcm because it sounds marginally better than 8-bit	2025-06-10 14:27:39 -07:00
uelen	89131404a3	Merge pull request 'comment_clean_up' (#4 ) from comment_clean_up into master ci/woodpecker/push/test-workflow Pipeline was successful Details Reviewed-on: #4	2025-06-10 20:40:39 +00:00
uelen	ce217dbbdf	Merge branch 'master' into comment_clean_up	2025-06-10 13:32:14 -07:00
uelen	f840d27b8e	Demo commit ci/woodpecker/push/test-workflow Pipeline was successful Details The audio output is still messed up, but this commit gets everything as ready as it can get. Fixed up all the testbenches and added state machines for everything	2025-06-10 13:26:35 -07:00
Dilanthi	9af830daa0	comment clean up	2025-06-10 02:51:18 -07:00
Dilanthi	53b48c0bce	comment clean up for segment_display folder	2025-06-10 01:38:52 -07:00