uelen/SDVD
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Dilanthi 3f626074f9
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Details
Added playback controller and testbench
2025-05-22 20:06:31 -07:00
.woodpecker
Add a wowrkflow to test that everything works
2025-05-07 17:40:55 -07:00
design
Added playback controller and testbench
2025-05-22 20:06:31 -07:00
verification
Added playback controller and testbench
2025-05-22 20:06:31 -07:00
.gitignore
Add vivado project
2025-05-16 17:16:08 -07:00
modules.md
Initial commit
2025-05-06 13:46:53 -07:00
Nexys-A7-100T-Master.xdc
Added a in-progress top file
2025-05-19 15:21:53 -07:00
SDVD.xpr
Added playback controller and testbench
2025-05-22 20:06:31 -07:00
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Description
An FPGA video player
353 MiB
Languages
SystemVerilog 73.3%
Tcl 26.6%
Python 0.1%