added pwn.sv

added x16 fast forward speed to playback_controller.sv

corrected dates on pwn.sv, playback_controller.sv, display_converter.sv,
and seconds_display.sv

design/audio/pwm.sv

@@ -1,3 +1,11 @@
+/****
+ * pwm.sv - [must edit in future]
+ *
+ * @author: Dilanthi Prentice, Waylon Cude
+ * @date: [not sure when due yet]
+ *
+ *
+ * */
 module pwm(
     input logic clk, reset,
     // Load control signal, if this is high we should load a new sample
@@ -8,25 +16,33 @@ module pwm(
     output wire pwm_pin
 );
 
-// What I imagine is that the counter here can be incremented each clock.
-// If the counter value is less than or equal to the value in the sample buffer
-// then you should turn on the PWM output. Otherwise if the counter is greater
-// than the value in the sample buffer the output will be off.
-//
-// This means that for small sample values the output will be enabled for only
-// short periods of time, exactly what we want.
 logic [15:0] pulse_counter;
-
-// A buffer to hold the sample in. Every clock cycle you should check load
-// to see if you should pull the sample off the bus and store it in here.
 logic [15:0] sample_buffer;
-
-// A control signal for driving the PWM high or low. This gets translated into
-// either a 'z or a '0 later as the PWM requires.
 logic should_output;
 
-// NOTE: tristating the pwm pin with a 'z will output a 1
-//       sending a 0 will pull the pin to 0 as usual
+always_ff @(posedge clk)
+begin
+    if (reset)
+    begin
+        pulse_counter <= 0;
+        sample_buffer <= 0;
+    end
+    
+    else
+    begin
+        if (load)
+            sample_buffer <= sample;
+        
+        pulse_counter <= pulse_counter + 1;
+
+        if (pulse_counter < sample_buffer)
+            should_output <= 1;
+        else
+            should_output <= 0;
+    end
+
+end
+
 assign pwm_pin = should_output ? 'z : '0;
 
 

design/playback_controller.sv

@@ -1,3 +1,14 @@
+/*****
+ * playback_controller.sv - A finite state machine with states that control
+ *                          playback speed. In additon to playing and pausing
+ *                          it can fast forward at 2x speed, 4x speed, 8x
+ *                          speed and 16x speed.
+ *
+ * @author: Dilanthi Prentice, Waylon Cude
+ * @date: 6/12/25
+ *
+ * */
+
 `include "sdvd_defs.sv"
 import sdvd_defs::SPEED;
 
@@ -10,12 +21,12 @@ module playback_controller(
     input logic play,
     input logic ff,
 
-    // Output is 0, 1x, 2x, 4x, or 8x
+    // Output is 0, 1x, 2x, 4x, 8x or 16x
     output SPEED speed
 );
 
 typedef enum logic [2:0] {
-    PAUSE, PLAY, FF2, FF4, FF8
+    PAUSE, PLAY, FF2, FF4, FF8, FF16
 } state_t;
 
 state_t current, next;
@@ -57,9 +68,15 @@ begin
         FF8:
             begin
                 if (play_pulse) next = PAUSE;
-                else if (ff_pulse) next = FF8;
+                else if (ff_pulse) next = FF16;
                 else next = FF8;
             end
+        FF16:
+            begin
+                if (play_pulse) next = PAUSE;
+                else if (ff_pulse) next = FF16;
+                else next = FF16;
+            end
         default:
             next = PAUSE;
     endcase
@@ -74,6 +91,7 @@ begin
         FF2:    speed = 2;
         FF4:    speed = 4;
         FF8:    speed = 8;
+        FF16:   speed = 16;
         default:speed = 0;
     endcase
 end

design/segment_display/display_converter.sv

@@ -4,7 +4,7 @@
 *                        do 0 - 9, A - F, individual segmentsm and special
 *                        characters.  
 * @author: Dilanthi Prentice, Waylon Cude
-* @date: [not sure when its due yet]
+* @date: 6/12/25
 *
 *
 ****/

design/segment_display/seconds_display.sv

@@ -2,7 +2,7 @@
 * seconds_display.sv - convert a seconds counter to a seven segement display.
 *
 * @author: Dilanthi Prentice, Waylon Cude
-* @date:[unsure of due date]
+* @date: 6/12/25
 *
 */
 module seconds_display

verification/audio/pwn_tb.sv

@@ -0,0 +1,6 @@
+/*****
+ * pwn_tb.sv - testbench for the pwn.sv module. 
+ *
+ * @author: Dilanthi Prentice, Waylon Cude
+ * @date: 6/12/2025
+ * */