uelen/SDVD
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dilanthi d4bedd06ce
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Details
added pwn.sv 
added x16 fast forward speed to playback_controller.sv

corrected dates on pwn.sv, playback_controller.sv, display_converter.sv,
and seconds_display.sv
2025-05-29 14:48:46 -07:00
.woodpecker
Add a wowrkflow to test that everything works
2025-05-07 17:40:55 -07:00
design
added pwn.sv
2025-05-29 14:48:46 -07:00
verification
added pwn.sv
2025-05-29 14:48:46 -07:00
.gitignore
Add vivado project
2025-05-16 17:16:08 -07:00
bugs.md
Added audio buffer
2025-05-28 19:23:17 -07:00
modules.md
Initial commit
2025-05-06 13:46:53 -07:00
Nexys-A7-100T-Master.xdc
Fixup to get main demo working
2025-05-26 22:52:14 -07:00
SDVD.xpr
Added audio buffer
2025-05-28 19:23:17 -07:00
Description
An FPGA video player
353 MiB
Languages
SystemVerilog 73.3%
Tcl 26.6%
Python 0.1%