This adds some unnecessary stuff into the debug core that I used to troubleshoot. There are like 5 bugfixes here. Especially of note is the low freq clock gen, I was trying to use modulo like you would do in a computer program but it was too slow, so I had to move the logic around a bunch.
This commit is contained in:
@@ -1,11 +1,20 @@
|
||||
// NOTE: This expects to be driven with a 100khz clock
|
||||
module display_anode_driver(input logic clk, input logic reset, output logic [7:0] AN);
|
||||
module display_anode_driver(
|
||||
input logic clk,
|
||||
input logic reset,
|
||||
output logic [7:0] AN,
|
||||
output logic [2:0] mux_select);
|
||||
|
||||
// This is just a shift register that drives each anode individually
|
||||
always_ff @(posedge clk) begin
|
||||
if (reset)
|
||||
AN <= 1;
|
||||
else
|
||||
if (reset) begin
|
||||
AN <= '1 - 1;
|
||||
mux_select <= 0;
|
||||
end
|
||||
else begin
|
||||
AN <= {AN[6:0], AN[7]};
|
||||
// Letting this overflow will automatically reset it
|
||||
mux_select <= mux_select + 1;
|
||||
end
|
||||
end
|
||||
endmodule
|
||||
|
||||
Reference in New Issue
Block a user