This module needs way reworked to just be a state machine. I was trying to get way too tricky with it so I went back to the drawing board and made a state machine diagram for it. The diagram is included with this commit. I also moved the current collection of documentation to a doc/ folder, and added a second-long audio rom to test everything out once the rom_sd is working.
15 lines
333 B
Markdown
15 lines
333 B
Markdown
## Bugs I Found
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### Audio Buffer
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- Forgot to assign to a delay counter
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### Debouncer
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- Logic was fundamentally wrong
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- Found multiple logic bugs with testbench and then assertions
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### Display Converter
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- Found a typo in a single digit
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### Low Freq Clock Gen
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- Was initially trying to do modulo at max clock speed, failing timing
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