Waylon Cude
71eecd18e8
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These were realy headaches but the testbenches are passing. We need to take a look at the audio_buffer testbench for sure, it is way wrong and needs reworked to use the interface. Should do a pass through every module probably.
42 lines
1.3 KiB
Markdown
42 lines
1.3 KiB
Markdown
## Bugs I Found
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### Audio Buffer
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- Forgot to assign to a delay counter
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### Debouncer
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- Logic was fundamentally wrong
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- Found multiple logic bugs with testbench and then assertions
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### Display Converter
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- Found a typo in a single digit
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### Low Freq Clock Gen
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- Was initially trying to do modulo at max clock speed, failing timing
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### sd_rom
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- ROM was getting totally optimized out and was doing nothing in simulation, and
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didn't show up in synthesized design
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- Timing issues, ROM was one cycle slower than expected, latching takes an extra
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cycle too, had to rework state machines, there are a bonus 2 delay states when
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starting and ending writes
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### PWM
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- major design problems
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- clocked too slow
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- initial goal of 16-bit audio isn't feasible because 100MHz isn't fast enough
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to pwm based on a 16-bit counter, would give a sample rate of 1.5khz
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### command_sender
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- output ready signal was delay a cycle because it was set by sequential logic,
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detected in testing, changed it to a combinational output for 1 cycle speedup
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### read_command
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- response_type was not getting correctly stored/set, breaking the module
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entirely. Detected in testbench
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- off-by-one error detected in the counter
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## read_data
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- audio buffer address to write to was never changing, caught in simulation
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- some off-by-one errors in the byte shifting were found and corrected
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