This module needs way reworked to just be a state machine. I was trying to get way too tricky with it so I went back to the drawing board and made a state machine diagram for it. The diagram is included with this commit. I also moved the current collection of documentation to a doc/ folder, and added a second-long audio rom to test everything out once the rom_sd is working.
333 B
333 B
Bugs I Found
Audio Buffer
- Forgot to assign to a delay counter
Debouncer
- Logic was fundamentally wrong
- Found multiple logic bugs with testbench and then assertions
Display Converter
- Found a typo in a single digit
Low Freq Clock Gen
- Was initially trying to do modulo at max clock speed, failing timing