Demo commit

The audio output is still messed up, but this commit gets everything as
ready as it can get. Fixed up all the testbenches and added state
machines for everything

design/audio/audio_buffer.sv

@@ -31,11 +31,14 @@ module audio_buffer(
     // Inputs for the memory buffer
     audio_buffer_interface.receiver driver
 );
-logic [9:0] address;
+// Size of samples, 8bit or 16bit supported
+parameter SIZE=16;
+(* MARK_DEBUG = "TRUE" *)
+logic [11-(SIZE/8):0] address;
 
 // State register
 logic enb;
-logic [15:0] doutb;
+logic [(SIZE-1):0] doutb;
 
 // A single bit counter, to avoid feeding samples given the 1 cycle read delay
 logic delay;
@@ -44,7 +47,7 @@ logic delay;
 // half of the 2KiB buffer
 //
 // The MSB of the address == higher/lower half address
-assign driver.address_half = address[9];
+assign driver.address_half = address[11-(SIZE/8)];
 
 always_ff @(posedge clk) begin
     enb <= 0;
@@ -75,7 +78,7 @@ always_ff @(posedge clk) begin
             // NOTE: I really don't know a good way to generate the load
             // signal. It maybe could be an inverted 48khz clock?
             if (delay == 0) begin
-                sample <= doutb;
+                sample[15-:SIZE] <= doutb;
             end
             else begin
                 sample <= '0;
@@ -91,7 +94,7 @@ end
 //) buffer ();
 xpm_memory_sdpram #(
   .ADDR_WIDTH_A(11),               // DECIMAL
-  .ADDR_WIDTH_B(10),               // DECIMAL
+  .ADDR_WIDTH_B(12-(SIZE/8)),       // DECIMAL
   .AUTO_SLEEP_TIME(0),            // DECIMAL
   .BYTE_WRITE_WIDTH_A(8),        // DECIMAL
   .CASCADE_HEIGHT(0),             // DECIMAL
@@ -107,7 +110,7 @@ xpm_memory_sdpram #(
   .MEMORY_SIZE(16*1024),             // DECIMAL
   .MESSAGE_CONTROL(0),            // DECIMAL
   .RAM_DECOMP("auto"),            // String
-  .READ_DATA_WIDTH_B(16),         // DECIMAL
+  .READ_DATA_WIDTH_B(SIZE),         // DECIMAL
   .READ_LATENCY_B(1),             // DECIMAL
   .READ_RESET_VALUE_B("0"),       // String
   .RST_MODE_A("SYNC"),            // String

design/audio/pwm.sv

@@ -21,6 +21,7 @@ module pwm(
 parameter DEPTH=11;
 
 logic [DEPTH-1:0] pulse_counter;
+(* MARK_DEBUG = "TRUE" *)
 logic [15:0] sample_buffer;
 logic should_output;