We have something at least, audio is working and sounding dang good
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-1
@@ -18,7 +18,7 @@ module pwm(
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);
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// This can't be 16 or we are slowing the audio rate down by a factor of
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// 2^5=32
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parameter DEPTH=8;
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parameter DEPTH=11;
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logic [DEPTH-1:0] pulse_counter;
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logic [15:0] sample_buffer;
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@@ -1,6 +1,6 @@
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module modular_clock_gen(
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input clk, reset,
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output oclk
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output logic oclk
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);
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parameter DIVISOR;
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@@ -8,7 +8,8 @@ logic [$clog2(DIVISOR)-1:0] counter;
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// clock will be high for about half of the cycle, depending on integer
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// rounding
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assign oclk = counter < (DIVISOR/2);
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// OOPS this makes it combinational
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//assign oclk = counter < (DIVISOR/2);
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always_ff @(posedge clk) begin
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if (reset)
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@@ -17,6 +18,8 @@ always_ff @(posedge clk) begin
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counter <= DIVISOR-1;
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else
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counter <= counter - 1;
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oclk <= counter < (DIVISOR/2);
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end
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endmodule
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@@ -102,7 +102,7 @@ audio_buffer audioBuffer(
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audio_interface.receiver
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);
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rom_sd romSdPlayer(clk_1mhz,reset,sd_ready,audio_interface.driver);
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rom_sd #("even_flow_16.mem") romSdPlayer(clk_1mhz,reset,sd_ready,audio_interface.driver);
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endmodule
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+3
-3
@@ -21,7 +21,7 @@ typedef enum logic [3:0]{
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state_t current, next;
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// First we write 2048B into the memory buffer, then signal to play it and
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// wait for half signal to avoid overwriting memory
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logic [16:0] rom_addr;
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logic [18:0] rom_addr;
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logic [7:0] rom_data;
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logic rom_enable;
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logic buffer_half;
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@@ -33,7 +33,7 @@ logic buffer_half;
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// The ROM has 17 address bits and 8 data bits to store 128KiB, more than
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// enough for one second of 48khz audio
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xpm_memory_sprom #(
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.ADDR_WIDTH_A(17), // DECIMAL
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.ADDR_WIDTH_A(19), // DECIMAL
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.AUTO_SLEEP_TIME(0), // DECIMAL
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.CASCADE_HEIGHT(0), // DECIMAL
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.ECC_BIT_RANGE("7:0"), // String
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@@ -44,7 +44,7 @@ xpm_memory_sprom #(
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.MEMORY_INIT_PARAM(""), // String
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.MEMORY_OPTIMIZATION("true"), // String
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.MEMORY_PRIMITIVE("auto"), // String
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.MEMORY_SIZE(131072*8), // DECIMAL
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.MEMORY_SIZE((1<<19)*8), // DECIMAL
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.MESSAGE_CONTROL(0), // DECIMAL
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.RAM_DECOMP("auto"), // String
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.READ_DATA_WIDTH_A(8), // DECIMAL
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