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Add debouncer TB and fixup on debouncer
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This commit is contained in:
Waylon Cude 2025-05-19 16:13:35 -07:00
parent 3b30a32045
commit 18aab51325
3 changed files with 62 additions and 11 deletions
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14
SDVD.xpr
View File

@ -45,7 +45,7 @@
<Option Name="SimulatorGccVersionActiveHdl" Val="9.3.0"/>
<Option Name="BoardPart" Val="digilentinc.com:nexys-a7-100t:part0:1.2"/>
<Option Name="BoardPartRepoPaths" Val="$PPRDIR/../../../.Xilinx/Vivado/2024.2/xhub/board_store/xilinx_board_store"/>
<Option Name="ActiveSimSet" Val="seconds_display_tb"/>
<Option Name="ActiveSimSet" Val="sim_1"/>
<Option Name="DefaultLib" Val="xil_defaultlib"/>
<Option Name="ProjectType" Val="Default"/>
<Option Name="IPRepoPath" Val="$PPRDIR/../../../fpga/vivado-library"/>
@ -61,7 +61,7 @@
<Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
<Option Name="EnableBDX" Val="FALSE"/>
<Option Name="DSABoardId" Val="nexys-a7-100t"/>
<Option Name="WTXSimLaunchSim" Val="9"/>
<Option Name="WTXSimLaunchSim" Val="16"/>
<Option Name="WTModelSimLaunchSim" Val="0"/>
<Option Name="WTQuestaLaunchSim" Val="0"/>
<Option Name="WTIesLaunchSim" Val="0"/>
@ -168,16 +168,8 @@
</FileSet>
<FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1" RelGenDir="$PGENDIR/sim_1">
<Filter Type="Srcs"/>
<File Path="$PPRDIR/verification/segment_display/seconds_display_tb.sv">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/verification/debouncer_tb.sv">
<FileInfo>
<Attr Name="AutoDisabled" Val="1"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
@ -185,7 +177,7 @@
</File>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="seconds_display_tb"/>
<Option Name="TopModule" Val="debouncer_tb"/>
<Option Name="TopLib" Val="xil_defaultlib"/>
<Option Name="TransportPathDelay" Val="0"/>
<Option Name="TransportIntDelay" Val="0"/>

4
design/debouncer.sv
View File

@ -11,6 +11,10 @@ always_ff @(posedge clk) begin
pressed <= 1;
else if (pressed && !source)
pressed <= 0;
else if (pressed && source)
pressed <= 0;
else if (!pressed && !source)
pressed <= 0;
end

55
verification/debouncer_tb.sv
View File

@ -1,8 +1,63 @@
`timescale 1ns / 1ps
module debouncer_tb;
logic clk,reset,source;
wire out;
int errors;
debouncer Dut (.*);
initial begin
clk = 0;
forever #10 clk = ~clk;
end
initial begin
$display("Testing debouncer");
reset = 1;
source = 0;
@(posedge clk);
@(posedge clk);
reset = 0;
@(posedge clk);
source = 1;
#1;
assert (out == 1) else begin
$error("Output not brought high during first press");
errors++;
end
@(posedge clk);
#1;
assert (out == 0) else begin
$error("Output not brought low after first press");
errors++;
end
@(posedge clk);
source = 0;
@(posedge clk);
source = 1;
#1;
assert (out == 1) else begin
$error("Output not brought high during second press");
errors++;
end
source = 0;
@(posedge clk);
#1;
assert (out == 0) else begin
$error("Output not brought low after second press");
errors++;
end
if (errors == 0)
$display("Found no errors while testing debouncer");
$finish;
end
endmodule