Waylon Cude
dff929de84
This module needs way reworked to just be a state machine. I was trying to get way too tricky with it so I went back to the drawing board and made a state machine diagram for it. The diagram is included with this commit. I also moved the current collection of documentation to a doc/ folder, and added a second-long audio rom to test everything out once the rom_sd is working.
19 lines
341 B
Systemverilog
19 lines
341 B
Systemverilog
interface audio_buffer_interface;
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logic [10:0] addra;
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logic [7:0] dina;
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logic clka;
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logic ena;
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logic address_half;
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modport driver (
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output addra, dina, clka, ena,
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input address_half
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);
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modport receiver (
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input addra, dina, clka, ena,
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output address_half
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);
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endinterface
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