Waylon Cude
f840d27b8e
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The audio output is still messed up, but this commit gets everything as ready as it can get. Fixed up all the testbenches and added state machines for everything
31 lines
648 B
Systemverilog
31 lines
648 B
Systemverilog
/***
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* sixty_display.sv - converts a five bit seconds counter to its seven segement display equivalent.
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*
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* @author: Dilanthi Prentice, Waylon Cude
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* @date: 6/12/25
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*
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*/
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module sixty_display
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(
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input [$clog2(60)-1:0] number,
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output [6:0] display_tens,
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output [6:0] display_ones
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);
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logic [4:0] ones_digit;
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logic [4:0] tens_digit;
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always_comb
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begin
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ones_digit = number % 10;
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tens_digit = number / 10;
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end
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//instantiate the display_converter to convert the counter
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//to a seven segment display number
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display_converter ones (ones_digit, display_ones);
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display_converter tens (tens_digit, display_tens);
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endmodule
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