31 lines
640 B
Systemverilog
31 lines
640 B
Systemverilog
/***
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* debouncer.sv - generates a debounced button press and turns it into
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* a single pulse.
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*
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* @author: Waylon Cude, Dilanthi Prentice
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* @date: 6-12-25
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*
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* */
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//NOTE: you should drive this with a slow clock to actually debounce input
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module debouncer(input logic clk, input reset, input source, output logic out);
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logic pressed;
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always_ff @(posedge clk) begin
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if (reset)
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pressed <= 0;
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if (!source) begin
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pressed <= 0;
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out <= 0;
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end
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else
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if (pressed)
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out <= 0;
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else begin
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pressed <= 1;
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out <= 1;
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end
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end
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endmodule
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