<?xml version="1.0" encoding="UTF-8"?>
<!-- Product Version: Vivado v2024.2 (64-bit)                              -->
<!--                                                                         -->
<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.                   -->
<!-- Copyright 2022-2024 Advanced Micro Devices, Inc. All Rights Reserved.   -->

<Project Product="Vivado" Version="7" Minor="68" Path="/home/uelen/Sync/ece571/SDVD/SDVD.xpr">
  <DefaultLaunch Dir="$PRUNDIR"/>
  <Configuration>
    <Option Name="Id" Val="ef9705cecf4b4a4599c24f6838c9c6ea"/>
    <Option Name="Part" Val="xc7a100tcsg324-1"/>
    <Option Name="CompiledLibDir" Val="$PCACHEDIR/compile_simlib"/>
    <Option Name="CompiledLibDirXSim" Val=""/>
    <Option Name="CompiledLibDirModelSim" Val="$PCACHEDIR/compile_simlib/modelsim"/>
    <Option Name="CompiledLibDirQuesta" Val="$PCACHEDIR/compile_simlib/questa"/>
    <Option Name="CompiledLibDirXcelium" Val="$PCACHEDIR/compile_simlib/xcelium"/>
    <Option Name="CompiledLibDirVCS" Val="$PCACHEDIR/compile_simlib/vcs"/>
    <Option Name="CompiledLibDirRiviera" Val="$PCACHEDIR/compile_simlib/riviera"/>
    <Option Name="CompiledLibDirActivehdl" Val="$PCACHEDIR/compile_simlib/activehdl"/>
    <Option Name="SimulatorInstallDirModelSim" Val=""/>
    <Option Name="SimulatorInstallDirQuesta" Val=""/>
    <Option Name="SimulatorInstallDirXcelium" Val=""/>
    <Option Name="SimulatorInstallDirVCS" Val=""/>
    <Option Name="SimulatorInstallDirRiviera" Val=""/>
    <Option Name="SimulatorInstallDirActiveHdl" Val=""/>
    <Option Name="SimulatorGccInstallDirModelSim" Val=""/>
    <Option Name="SimulatorGccInstallDirQuesta" Val=""/>
    <Option Name="SimulatorGccInstallDirXcelium" Val=""/>
    <Option Name="SimulatorGccInstallDirVCS" Val=""/>
    <Option Name="SimulatorGccInstallDirRiviera" Val=""/>
    <Option Name="SimulatorGccInstallDirActiveHdl" Val=""/>
    <Option Name="SimulatorVersionXsim" Val="2024.2"/>
    <Option Name="SimulatorVersionModelSim" Val="2024.1"/>
    <Option Name="SimulatorVersionQuesta" Val="2024.1"/>
    <Option Name="SimulatorVersionXcelium" Val="24.03.003"/>
    <Option Name="SimulatorVersionVCS" Val="V-2023.12-SP1"/>
    <Option Name="SimulatorVersionRiviera" Val="2024.04"/>
    <Option Name="SimulatorVersionActiveHdl" Val="15.0"/>
    <Option Name="SimulatorGccVersionXsim" Val="9.3.0"/>
    <Option Name="SimulatorGccVersionModelSim" Val="7.4.0"/>
    <Option Name="SimulatorGccVersionQuesta" Val="7.4.0"/>
    <Option Name="SimulatorGccVersionXcelium" Val="9.3.0"/>
    <Option Name="SimulatorGccVersionVCS" Val="9.2.0"/>
    <Option Name="SimulatorGccVersionRiviera" Val="9.3.0"/>
    <Option Name="SimulatorGccVersionActiveHdl" Val="9.3.0"/>
    <Option Name="BoardPart" Val=""/>
    <Option Name="SourceMgmtMode" Val="DisplayOnly"/>
    <Option Name="ActiveSimSet" Val="sd_controller_tb"/>
    <Option Name="DefaultLib" Val="xil_defaultlib"/>
    <Option Name="ProjectType" Val="Default"/>
    <Option Name="IPRepoPath" Val="$PPRDIR/../../../fpga/vivado-library"/>
    <Option Name="IPOutputRepo" Val="$PCACHEDIR/ip"/>
    <Option Name="IPDefaultOutputPath" Val="$PGENDIR/sources_1"/>
    <Option Name="IPCachePermission" Val="read"/>
    <Option Name="IPCachePermission" Val="write"/>
    <Option Name="EnableCoreContainer" Val="FALSE"/>
    <Option Name="EnableResourceEstimation" Val="FALSE"/>
    <Option Name="SimCompileState" Val="TRUE"/>
    <Option Name="CreateRefXciForCoreContainers" Val="FALSE"/>
    <Option Name="IPUserFilesDir" Val="$PIPUSERFILESDIR"/>
    <Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
    <Option Name="EnableBDX" Val="FALSE"/>
    <Option Name="DSABoardId" Val="nexys-a7-100t"/>
    <Option Name="WTXSimLaunchSim" Val="211"/>
    <Option Name="WTModelSimLaunchSim" Val="0"/>
    <Option Name="WTQuestaLaunchSim" Val="0"/>
    <Option Name="WTIesLaunchSim" Val="0"/>
    <Option Name="WTVcsLaunchSim" Val="0"/>
    <Option Name="WTRivieraLaunchSim" Val="0"/>
    <Option Name="WTActivehdlLaunchSim" Val="0"/>
    <Option Name="WTXSimExportSim" Val="1"/>
    <Option Name="WTModelSimExportSim" Val="1"/>
    <Option Name="WTQuestaExportSim" Val="1"/>
    <Option Name="WTIesExportSim" Val="0"/>
    <Option Name="WTVcsExportSim" Val="1"/>
    <Option Name="WTRivieraExportSim" Val="1"/>
    <Option Name="WTActivehdlExportSim" Val="0"/>
    <Option Name="GenerateIPUpgradeLog" Val="TRUE"/>
    <Option Name="XSimRadix" Val="hex"/>
    <Option Name="XSimTimeUnit" Val="ns"/>
    <Option Name="XSimArrayDisplayLimit" Val="1024"/>
    <Option Name="XSimTraceLimit" Val="65536"/>
    <Option Name="SimTypes" Val="rtl"/>
    <Option Name="SimTypes" Val="bfm"/>
    <Option Name="SimTypes" Val="tlm"/>
    <Option Name="SimTypes" Val="tlm_dpi"/>
    <Option Name="MEMEnableMemoryMapGeneration" Val="TRUE"/>
    <Option Name="DcpsUptoDate" Val="TRUE"/>
    <Option Name="UseInlineHdlIP" Val="TRUE"/>
    <Option Name="LocalIPRepoLeafDirName" Val="ip_repo"/>
  </Configuration>
  <FileSets Version="1" Minor="32">
    <FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1">
      <Filter Type="Srcs"/>
      <File Path="$PPRDIR/lib/audio_buffer_interface.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/lib/sdvd_defs.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/audio/audio_buffer.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/debouncer.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/segment_display/display_anode_driver.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/segment_display/display_converter.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/low_freq_clock_gen.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/modular_clock_gen.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/playback_controller.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/audio/pwm.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/sd/rom_sd.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/segment_display/seconds_display.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/nexys_a7_top.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/lib/assertion_error.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/roms/roundabout.mem">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/roms/even_flow_16.mem">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/sd/send_command.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/sd/crc_gen.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/sd/read_command.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/sd/read_data.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/design/sd/sd_controller.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="nexys_a7_top"/>
        <Option Name="TopAutoSet" Val="TRUE"/>
        <Option Name="VerilogDir" Val="$PPRDIR/design"/>
        <Option Name="VerilogDir" Val="$PPRDIR/lib"/>
      </Config>
    </FileSet>
    <FileSet Name="constrs_1" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1" RelGenDir="$PGENDIR/constrs_1">
      <Filter Type="Constrs"/>
      <File Path="$PPRDIR/Nexys-A7-100T-Master.xdc">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="TargetConstrsFile" Val="$PPRDIR/Nexys-A7-100T-Master.xdc"/>
        <Option Name="ConstrsType" Val="XDC"/>
      </Config>
    </FileSet>
    <FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1" RelGenDir="$PGENDIR/sim_1">
      <Filter Type="Srcs"/>
      <File Path="$PPRDIR/verification/debouncer_assertions.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/verification/debouncer_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="debouncer_tb"/>
        <Option Name="TopLib" Val="xil_defaultlib"/>
        <Option Name="TransportPathDelay" Val="0"/>
        <Option Name="TransportIntDelay" Val="0"/>
        <Option Name="SelectedSimModel" Val="rtl"/>
        <Option Name="PamDesignTestbench" Val=""/>
        <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
        <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
        <Option Name="PamPseudoTop" Val="pseudo_tb"/>
        <Option Name="SrcSet" Val="sources_1"/>
        <Option Name="CosimPdi" Val=""/>
        <Option Name="CosimPlatform" Val=""/>
        <Option Name="CosimElf" Val=""/>
        <Option Name="xsim.simulate.runtime" Val="1s"/>
      </Config>
    </FileSet>
    <FileSet Name="utils_1" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
      <Filter Type="Utils"/>
      <File Path="$PSRCDIR/utils_1/imports/synth_1/nexys_a7_top.dcp">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedInSteps" Val="synth_1"/>
          <Attr Name="AutoDcp" Val="1"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="TopAutoSet" Val="TRUE"/>
      </Config>
    </FileSet>
    <FileSet Name="seconds_display_tb" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/seconds_display_tb" RelGenDir="$PGENDIR/seconds_display_tb">
      <Filter Type="Srcs"/>
      <File Path="$PPRDIR/verification/segment_display/seconds_display_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="seconds_display_tb"/>
        <Option Name="TopLib" Val="xil_defaultlib"/>
        <Option Name="TransportPathDelay" Val="0"/>
        <Option Name="TransportIntDelay" Val="0"/>
        <Option Name="SelectedSimModel" Val="rtl"/>
        <Option Name="PamDesignTestbench" Val=""/>
        <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
        <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
        <Option Name="PamPseudoTop" Val="pseudo_tb"/>
        <Option Name="SrcSet" Val="sources_1"/>
        <Option Name="CosimPdi" Val=""/>
        <Option Name="CosimPlatform" Val=""/>
        <Option Name="CosimElf" Val=""/>
      </Config>
    </FileSet>
    <FileSet Name="playback_controller_tb" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/playback_controller_tb" RelGenDir="$PGENDIR/playback_controller_tb">
      <Filter Type="Srcs"/>
      <File Path="$PPRDIR/lib/sdvd_defs.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/verification/playback_controller_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="playback_controller_tb"/>
        <Option Name="TopLib" Val="xil_defaultlib"/>
        <Option Name="VerilogDir" Val="$PPRDIR/design"/>
        <Option Name="TransportPathDelay" Val="0"/>
        <Option Name="TransportIntDelay" Val="0"/>
        <Option Name="SelectedSimModel" Val="rtl"/>
        <Option Name="PamDesignTestbench" Val=""/>
        <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
        <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
        <Option Name="PamPseudoTop" Val="pseudo_tb"/>
        <Option Name="SrcSet" Val="sources_1"/>
        <Option Name="CosimPdi" Val=""/>
        <Option Name="CosimPlatform" Val=""/>
        <Option Name="CosimElf" Val=""/>
      </Config>
    </FileSet>
    <FileSet Name="audio_buffer_tb" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/audio_buffer_tb" RelGenDir="$PGENDIR/audio_buffer_tb">
      <Filter Type="Srcs"/>
      <File Path="$PPRDIR/verification/audio/audio_buffer_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="audio_buffer_tb"/>
        <Option Name="TopLib" Val="xil_defaultlib"/>
        <Option Name="TransportPathDelay" Val="0"/>
        <Option Name="TransportIntDelay" Val="0"/>
        <Option Name="SelectedSimModel" Val="rtl"/>
        <Option Name="PamDesignTestbench" Val=""/>
        <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
        <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
        <Option Name="PamPseudoTop" Val="pseudo_tb"/>
        <Option Name="SrcSet" Val="sources_1"/>
        <Option Name="CosimPdi" Val=""/>
        <Option Name="CosimPlatform" Val=""/>
        <Option Name="CosimElf" Val=""/>
        <Option Name="xsim.simulate.runtime" Val="10s"/>
      </Config>
    </FileSet>
    <FileSet Name="rom_sd_tb" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/rom_sd_tb" RelGenDir="$PGENDIR/rom_sd_tb">
      <Filter Type="Srcs"/>
      <File Path="$PPRDIR/roms/testfile.mem">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/verification/sd/rom_sd_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/verification/waveform_configs/rom_sd_waveform.wcfg">
        <FileInfo>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/roms/consecutive.mem">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="rom_sd_tb"/>
        <Option Name="TopLib" Val="xil_defaultlib"/>
        <Option Name="TransportPathDelay" Val="0"/>
        <Option Name="TransportIntDelay" Val="0"/>
        <Option Name="SelectedSimModel" Val="rtl"/>
        <Option Name="PamDesignTestbench" Val=""/>
        <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
        <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
        <Option Name="PamPseudoTop" Val="pseudo_tb"/>
        <Option Name="SrcSet" Val="sources_1"/>
        <Option Name="XSimWcfgFile" Val="$PPRDIR/verification/waveform_configs/rom_sd_waveform.wcfg"/>
        <Option Name="CosimPdi" Val=""/>
        <Option Name="CosimPlatform" Val=""/>
        <Option Name="CosimElf" Val=""/>
        <Option Name="xsim.simulate.runtime" Val="1s"/>
      </Config>
    </FileSet>
    <FileSet Name="pwm_tb" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/pwm_tb" RelGenDir="$PGENDIR/pwm_tb">
      <Filter Type="Srcs"/>
      <File Path="$PPRDIR/verification/audio/pwm_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="pwm_tb"/>
        <Option Name="TopLib" Val="xil_defaultlib"/>
        <Option Name="TransportPathDelay" Val="0"/>
        <Option Name="TransportIntDelay" Val="0"/>
        <Option Name="SelectedSimModel" Val="rtl"/>
        <Option Name="PamDesignTestbench" Val=""/>
        <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
        <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
        <Option Name="PamPseudoTop" Val="pseudo_tb"/>
        <Option Name="SrcSet" Val="sources_1"/>
        <Option Name="CosimPdi" Val=""/>
        <Option Name="CosimPlatform" Val=""/>
        <Option Name="CosimElf" Val=""/>
        <Option Name="xsim.simulate.runtime" Val="1s"/>
      </Config>
    </FileSet>
    <FileSet Name="crc_gen_tb" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/crc_gen_tb" RelGenDir="$PGENDIR/crc_gen_tb">
      <Filter Type="Srcs"/>
      <File Path="$PPRDIR/verification/sd/rom_sd_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/verification/sd/crc_gen_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/verification/waveform_configs/crc_gen_tb_behav.wcfg">
        <FileInfo>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="crc_gen_tb"/>
        <Option Name="TopLib" Val="xil_defaultlib"/>
        <Option Name="TransportPathDelay" Val="0"/>
        <Option Name="TransportIntDelay" Val="0"/>
        <Option Name="SelectedSimModel" Val="rtl"/>
        <Option Name="PamDesignTestbench" Val=""/>
        <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
        <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
        <Option Name="PamPseudoTop" Val="pseudo_tb"/>
        <Option Name="SrcSet" Val="sources_1"/>
        <Option Name="XSimWcfgFile" Val="$PPRDIR/verification/waveform_configs/crc_gen_tb_behav.wcfg"/>
        <Option Name="CosimPdi" Val=""/>
        <Option Name="CosimPlatform" Val=""/>
        <Option Name="CosimElf" Val=""/>
        <Option Name="xsim.simulate.runtime" Val="1s"/>
      </Config>
    </FileSet>
    <FileSet Name="send_command_tb" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/send_command_tb" RelGenDir="$PGENDIR/send_command_tb">
      <Filter Type="Srcs"/>
      <File Path="$PPRDIR/verification/sd/send_command_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="send_command_tb"/>
        <Option Name="TopLib" Val="xil_defaultlib"/>
        <Option Name="TransportPathDelay" Val="0"/>
        <Option Name="TransportIntDelay" Val="0"/>
        <Option Name="SelectedSimModel" Val="rtl"/>
        <Option Name="PamDesignTestbench" Val=""/>
        <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
        <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
        <Option Name="PamPseudoTop" Val="pseudo_tb"/>
        <Option Name="SrcSet" Val="sources_1"/>
        <Option Name="CosimPdi" Val=""/>
        <Option Name="CosimPlatform" Val=""/>
        <Option Name="CosimElf" Val=""/>
        <Option Name="xsim.simulate.runtime" Val="1s"/>
      </Config>
    </FileSet>
    <FileSet Name="read_command_tb" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/read_command_tb" RelGenDir="$PGENDIR/read_command_tb">
      <Filter Type="Srcs"/>
      <File Path="$PPRDIR/verification/sd/read_command_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/verification/waveform_configs/read_command_tb_behav.wcfg">
        <FileInfo>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="read_command_tb"/>
        <Option Name="TopLib" Val="xil_defaultlib"/>
        <Option Name="TransportPathDelay" Val="0"/>
        <Option Name="TransportIntDelay" Val="0"/>
        <Option Name="SelectedSimModel" Val="rtl"/>
        <Option Name="PamDesignTestbench" Val=""/>
        <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
        <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
        <Option Name="PamPseudoTop" Val="pseudo_tb"/>
        <Option Name="SrcSet" Val="sources_1"/>
        <Option Name="XSimWcfgFile" Val="$PPRDIR/verification/waveform_configs/read_command_tb_behav.wcfg"/>
        <Option Name="CosimPdi" Val=""/>
        <Option Name="CosimPlatform" Val=""/>
        <Option Name="CosimElf" Val=""/>
        <Option Name="xsim.simulate.runtime" Val="1s"/>
      </Config>
    </FileSet>
    <FileSet Name="read_data_tb" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/read_data_tb" RelGenDir="$PGENDIR/read_data_tb">
      <Filter Type="Srcs"/>
      <File Path="$PPRDIR/verification/sd/read_data_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/verification/waveform_configs/read_data_tb_behav.wcfg">
        <FileInfo>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="read_data_tb"/>
        <Option Name="TopLib" Val="xil_defaultlib"/>
        <Option Name="TransportPathDelay" Val="0"/>
        <Option Name="TransportIntDelay" Val="0"/>
        <Option Name="SelectedSimModel" Val="rtl"/>
        <Option Name="PamDesignTestbench" Val=""/>
        <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
        <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
        <Option Name="PamPseudoTop" Val="pseudo_tb"/>
        <Option Name="SrcSet" Val="sources_1"/>
        <Option Name="XSimWcfgFile" Val="$PPRDIR/verification/waveform_configs/read_data_tb_behav.wcfg"/>
        <Option Name="CosimPdi" Val=""/>
        <Option Name="CosimPlatform" Val=""/>
        <Option Name="CosimElf" Val=""/>
        <Option Name="xsim.simulate.runtime" Val="1s"/>
      </Config>
    </FileSet>
    <FileSet Name="sd_controller_tb" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sd_controller_tb" RelGenDir="$PGENDIR/sd_controller_tb">
      <File Path="$PPRDIR/verification/sd/sd_controller_tb.sv">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PPRDIR/verification/waveform_configs/sd_controller_tb_behav.wcfg">
        <FileInfo>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="sd_controller_tb"/>
        <Option Name="TopLib" Val="xil_defaultlib"/>
        <Option Name="TransportPathDelay" Val="0"/>
        <Option Name="TransportIntDelay" Val="0"/>
        <Option Name="SelectedSimModel" Val="rtl"/>
        <Option Name="PamDesignTestbench" Val=""/>
        <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
        <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
        <Option Name="PamPseudoTop" Val="pseudo_tb"/>
        <Option Name="SrcSet" Val="sources_1"/>
        <Option Name="XSimWcfgFile" Val="$PPRDIR/verification/waveform_configs/sd_controller_tb_behav.wcfg"/>
        <Option Name="CosimPdi" Val=""/>
        <Option Name="CosimPlatform" Val=""/>
        <Option Name="CosimElf" Val=""/>
        <Option Name="xsim.simulate.runtime" Val="1s"/>
      </Config>
    </FileSet>
  </FileSets>
  <Simulators>
    <Simulator Name="XSim">
      <Option Name="Description" Val="Vivado Simulator"/>
      <Option Name="CompiledLib" Val="0"/>
    </Simulator>
    <Simulator Name="ModelSim">
      <Option Name="Description" Val="ModelSim Simulator"/>
    </Simulator>
    <Simulator Name="Questa">
      <Option Name="Description" Val="Questa Advanced Simulator"/>
    </Simulator>
    <Simulator Name="Xcelium">
      <Option Name="Description" Val="Xcelium Parallel Simulator"/>
    </Simulator>
    <Simulator Name="VCS">
      <Option Name="Description" Val="Verilog Compiler Simulator (VCS)"/>
    </Simulator>
    <Simulator Name="Riviera">
      <Option Name="Description" Val="Riviera-PRO Simulator"/>
    </Simulator>
  </Simulators>
  <Runs Version="1" Minor="22">
    <Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7a100tcsg324-1" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="true" IncrementalCheckpoint="$PSRCDIR/utils_1/imports/synth_1/nexys_a7_top.dcp" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_1" ParallelReportGen="true">
      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2024"/>
        <Step Id="synth_design"/>
      </Strategy>
      <GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
      <ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2024"/>
      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
      <RQSFiles/>
    </Run>
    <Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7a100tcsg324-1" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/impl_1" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" LaunchOptions="-jobs 4 " AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1" ParallelReportGen="true">
      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024"/>
        <Step Id="init_design"/>
        <Step Id="opt_design"/>
        <Step Id="power_opt_design"/>
        <Step Id="place_design"/>
        <Step Id="post_place_power_opt_design"/>
        <Step Id="phys_opt_design"/>
        <Step Id="route_design"/>
        <Step Id="post_route_phys_opt_design"/>
        <Step Id="write_bitstream"/>
      </Strategy>
      <GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
      <ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024"/>
      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
      <RQSFiles/>
    </Run>
    <Run Id="impl_1_copy_1" Type="Ft2:EntireDesign" Part="xc7a100tcsg324-1" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1/impl_1_copy_1" AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1/impl_1_copy_1" ParallelReportGen="true">
      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024"/>
        <Step Id="init_design"/>
        <Step Id="opt_design"/>
        <Step Id="power_opt_design"/>
        <Step Id="place_design"/>
        <Step Id="post_place_power_opt_design"/>
        <Step Id="phys_opt_design"/>
        <Step Id="route_design"/>
        <Step Id="post_route_phys_opt_design"/>
        <Step Id="write_bitstream"/>
      </Strategy>
      <ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024" CtrlBit="true">
        <ReportConfig DisplayName="Timing Summary - Design Initialization" Name="impl_1_copy_1_init_report_timing_summary_0" Spec="report_timing_summary" RunStep="init_design" ReportFile="nexys_a7_top_timing_summary_init.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="DRC - Opt Design" Name="impl_1_copy_1_opt_report_drc_0" Spec="report_drc" RunStep="opt_design" ReportFile="nexys_a7_top_drc_opted.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Opt Design" Name="impl_1_copy_1_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="opt_design" ReportFile="nexys_a7_top_timing_summary_opted.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Power Opt Design" Name="impl_1_copy_1_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="power_opt_design" ReportFile="nexys_a7_top_timing_summary_pwropted.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="IO - Place Design" Name="impl_1_copy_1_place_report_io_0" Spec="report_io" RunStep="place_design" ReportFile="nexys_a7_top_io_placed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Utilization - Place Design" Name="impl_1_copy_1_place_report_utilization_0" Spec="report_utilization" RunStep="place_design" ReportFile="nexys_a7_top_utilization_placed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Control Sets - Place Design" Name="impl_1_copy_1_place_report_control_sets_0" Spec="report_control_sets" RunStep="place_design" ReportFile="nexys_a7_top_control_sets_placed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="verbose" Type="" Value="true"/>
        </ReportConfig>
        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_1_place_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_pre_placed.rpt.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_1_place_report_incremental_reuse_1" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_placed.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Place Design" Name="impl_1_copy_1_place_report_timing_summary_0" Spec="report_timing_summary" RunStep="place_design" ReportFile="nexys_a7_top_timing_summary_placed.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Post-Place Power Opt Design" Name="impl_1_copy_1_post_place_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_place_power_opt_design" ReportFile="nexys_a7_top_timing_summary_postplace_pwropted.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Post-Place Phys Opt Design" Name="impl_1_copy_1_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="phys_opt_design" ReportFile="nexys_a7_top_timing_summary_physopted.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="implementation_log" Name="impl_1_copy_1_route_implementation_log_0" Spec="" RunStep="route_design" ReportFile="nexys_a7_top.vdi">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="DRC - Route Design" Name="impl_1_copy_1_route_report_drc_0" Spec="report_drc" RunStep="route_design" ReportFile="nexys_a7_top_drc_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Methodology - Route Design" Name="impl_1_copy_1_route_report_methodology_0" Spec="report_methodology" RunStep="route_design" ReportFile="nexys_a7_top_methodology_drc_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Power - Route Design" Name="impl_1_copy_1_route_report_power_0" Spec="report_power" RunStep="route_design" ReportFile="nexys_a7_top_power_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Route Status - Route Design" Name="impl_1_copy_1_route_report_route_status_0" Spec="report_route_status" RunStep="route_design" ReportFile="nexys_a7_top_route_status.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Route Design" Name="impl_1_copy_1_route_report_timing_summary_0" Spec="report_timing_summary" RunStep="route_design" ReportFile="nexys_a7_top_timing_summary_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Incremental Reuse - Route Design" Name="impl_1_copy_1_route_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="route_design" ReportFile="nexys_a7_top_incremental_reuse_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Clock Utilization - Route Design" Name="impl_1_copy_1_route_report_clock_utilization_0" Spec="report_clock_utilization" RunStep="route_design" ReportFile="nexys_a7_top_clock_utilization_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Bus Skew - Route Design" Name="impl_1_copy_1_route_report_bus_skew_0" Spec="report_bus_skew" RunStep="route_design" ReportFile="nexys_a7_top_bus_skew_routed.rpt" Version="1" Minor="1">
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Post-Route Phys Opt Design" Name="impl_1_copy_1_post_route_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_timing_summary_postroute_physopted.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Bus Skew - Post-Route Phys Opt Design" Name="impl_1_copy_1_post_route_phys_opt_report_bus_skew_0" Spec="report_bus_skew" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_bus_skew_postroute_physopted.rpt" Version="1" Minor="1">
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="implementation_log" Name="impl_1_copy_1_bitstream_implementation_log_0" Spec="" RunStep="write_bitstream" ReportFile="nexys_a7_top.vdi">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
      </ReportStrategy>
      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
      <RQSFiles/>
    </Run>
    <Run Id="impl_1_copy_2" Type="Ft2:EntireDesign" Part="xc7a100tcsg324-1" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1/impl_1_copy_2" AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1/impl_1_copy_2" ParallelReportGen="true">
      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024"/>
        <Step Id="init_design"/>
        <Step Id="opt_design"/>
        <Step Id="power_opt_design"/>
        <Step Id="place_design"/>
        <Step Id="post_place_power_opt_design"/>
        <Step Id="phys_opt_design"/>
        <Step Id="route_design"/>
        <Step Id="post_route_phys_opt_design"/>
        <Step Id="write_bitstream"/>
      </Strategy>
      <ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024" CtrlBit="true">
        <ReportConfig DisplayName="Timing Summary - Design Initialization" Name="impl_1_copy_2_init_report_timing_summary_0" Spec="report_timing_summary" RunStep="init_design" ReportFile="nexys_a7_top_timing_summary_init.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="DRC - Opt Design" Name="impl_1_copy_2_opt_report_drc_0" Spec="report_drc" RunStep="opt_design" ReportFile="nexys_a7_top_drc_opted.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Opt Design" Name="impl_1_copy_2_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="opt_design" ReportFile="nexys_a7_top_timing_summary_opted.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Power Opt Design" Name="impl_1_copy_2_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="power_opt_design" ReportFile="nexys_a7_top_timing_summary_pwropted.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="IO - Place Design" Name="impl_1_copy_2_place_report_io_0" Spec="report_io" RunStep="place_design" ReportFile="nexys_a7_top_io_placed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Utilization - Place Design" Name="impl_1_copy_2_place_report_utilization_0" Spec="report_utilization" RunStep="place_design" ReportFile="nexys_a7_top_utilization_placed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Control Sets - Place Design" Name="impl_1_copy_2_place_report_control_sets_0" Spec="report_control_sets" RunStep="place_design" ReportFile="nexys_a7_top_control_sets_placed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="verbose" Type="" Value="true"/>
        </ReportConfig>
        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_2_place_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_pre_placed.rpt.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_2_place_report_incremental_reuse_1" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_placed.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Place Design" Name="impl_1_copy_2_place_report_timing_summary_0" Spec="report_timing_summary" RunStep="place_design" ReportFile="nexys_a7_top_timing_summary_placed.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Post-Place Power Opt Design" Name="impl_1_copy_2_post_place_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_place_power_opt_design" ReportFile="nexys_a7_top_timing_summary_postplace_pwropted.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Post-Place Phys Opt Design" Name="impl_1_copy_2_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="phys_opt_design" ReportFile="nexys_a7_top_timing_summary_physopted.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="implementation_log" Name="impl_1_copy_2_route_implementation_log_0" Spec="" RunStep="route_design" ReportFile="nexys_a7_top.vdi">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="DRC - Route Design" Name="impl_1_copy_2_route_report_drc_0" Spec="report_drc" RunStep="route_design" ReportFile="nexys_a7_top_drc_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Methodology - Route Design" Name="impl_1_copy_2_route_report_methodology_0" Spec="report_methodology" RunStep="route_design" ReportFile="nexys_a7_top_methodology_drc_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Power - Route Design" Name="impl_1_copy_2_route_report_power_0" Spec="report_power" RunStep="route_design" ReportFile="nexys_a7_top_power_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Route Status - Route Design" Name="impl_1_copy_2_route_report_route_status_0" Spec="report_route_status" RunStep="route_design" ReportFile="nexys_a7_top_route_status.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Route Design" Name="impl_1_copy_2_route_report_timing_summary_0" Spec="report_timing_summary" RunStep="route_design" ReportFile="nexys_a7_top_timing_summary_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Incremental Reuse - Route Design" Name="impl_1_copy_2_route_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="route_design" ReportFile="nexys_a7_top_incremental_reuse_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Clock Utilization - Route Design" Name="impl_1_copy_2_route_report_clock_utilization_0" Spec="report_clock_utilization" RunStep="route_design" ReportFile="nexys_a7_top_clock_utilization_routed.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Bus Skew - Route Design" Name="impl_1_copy_2_route_report_bus_skew_0" Spec="report_bus_skew" RunStep="route_design" ReportFile="nexys_a7_top_bus_skew_routed.rpt" Version="1" Minor="1">
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Post-Route Phys Opt Design" Name="impl_1_copy_2_post_route_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_timing_summary_postroute_physopted.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Bus Skew - Post-Route Phys Opt Design" Name="impl_1_copy_2_post_route_phys_opt_report_bus_skew_0" Spec="report_bus_skew" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_bus_skew_postroute_physopted.rpt" Version="1" Minor="1">
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="implementation_log" Name="impl_1_copy_2_bitstream_implementation_log_0" Spec="" RunStep="write_bitstream" ReportFile="nexys_a7_top.vdi">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
      </ReportStrategy>
      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
      <RQSFiles/>
    </Run>
    <Run Id="impl_1_copy_3" Type="Ft2:EntireDesign" Part="xc7a100tcsg324-1" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1/impl_1_copy_3" AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1/impl_1_copy_3" ParallelReportGen="true">
      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2024"/>
        <Step Id="init_design"/>
        <Step Id="opt_design"/>
        <Step Id="power_opt_design"/>
        <Step Id="place_design"/>
        <Step Id="post_place_power_opt_design"/>
        <Step Id="phys_opt_design"/>
        <Step Id="route_design"/>
        <Step Id="post_route_phys_opt_design"/>
        <Step Id="write_bitstream"/>
      </Strategy>
      <ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2024" CtrlBit="true">
        <ReportConfig DisplayName="Timing Summary - Design Initialization" Name="impl_1_copy_3_init_report_timing_summary_0" Spec="report_timing_summary" RunStep="init_design" ReportFile="nexys_a7_top_timing_summary_init_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="DRC - Opt Design" Name="impl_1_copy_3_opt_report_drc_0" Spec="report_drc" RunStep="opt_design" ReportFile="nexys_a7_top_drc_opted_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Opt Design" Name="impl_1_copy_3_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="opt_design" ReportFile="nexys_a7_top_timing_summary_opted_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Power Opt Design" Name="impl_1_copy_3_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="power_opt_design" ReportFile="nexys_a7_top_timing_summary_pwropted_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="IO - Place Design" Name="impl_1_copy_3_place_report_io_0" Spec="report_io" RunStep="place_design" ReportFile="nexys_a7_top_io_placed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Utilization - Place Design" Name="impl_1_copy_3_place_report_utilization_0" Spec="report_utilization" RunStep="place_design" ReportFile="nexys_a7_top_utilization_placed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Control Sets - Place Design" Name="impl_1_copy_3_place_report_control_sets_0" Spec="report_control_sets" RunStep="place_design" ReportFile="nexys_a7_top_control_sets_placed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="verbose" Type="" Value="true"/>
        </ReportConfig>
        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_3_place_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_pre_placed.rpt_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Incremental Reuse - Place Design" Name="impl_1_copy_3_place_report_incremental_reuse_1" Spec="report_incremental_reuse" RunStep="place_design" ReportFile="nexys_a7_top_incremental_reuse_placed_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Place Design" Name="impl_1_copy_3_place_report_timing_summary_0" Spec="report_timing_summary" RunStep="place_design" ReportFile="nexys_a7_top_timing_summary_placed_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Post-Place Power Opt Design" Name="impl_1_copy_3_post_place_power_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_place_power_opt_design" ReportFile="nexys_a7_top_timing_summary_postplace_pwropted_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Post-Place Phys Opt Design" Name="impl_1_copy_3_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="phys_opt_design" ReportFile="nexys_a7_top_timing_summary_physopted_1.rpt" Version="1" Minor="0" IsDisabled="true">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="implementation_log" Name="impl_1_copy_3_route_implementation_log_0" Spec="" RunStep="route_design" ReportFile="nexys_a7_top.vdi">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="DRC - Route Design" Name="impl_1_copy_3_route_report_drc_0" Spec="report_drc" RunStep="route_design" ReportFile="nexys_a7_top_drc_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Methodology - Route Design" Name="impl_1_copy_3_route_report_methodology_0" Spec="report_methodology" RunStep="route_design" ReportFile="nexys_a7_top_methodology_drc_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Power - Route Design" Name="impl_1_copy_3_route_report_power_0" Spec="report_power" RunStep="route_design" ReportFile="nexys_a7_top_power_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Route Status - Route Design" Name="impl_1_copy_3_route_report_route_status_0" Spec="report_route_status" RunStep="route_design" ReportFile="nexys_a7_top_route_status_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Route Design" Name="impl_1_copy_3_route_report_timing_summary_0" Spec="report_timing_summary" RunStep="route_design" ReportFile="nexys_a7_top_timing_summary_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Incremental Reuse - Route Design" Name="impl_1_copy_3_route_report_incremental_reuse_0" Spec="report_incremental_reuse" RunStep="route_design" ReportFile="nexys_a7_top_incremental_reuse_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Clock Utilization - Route Design" Name="impl_1_copy_3_route_report_clock_utilization_0" Spec="report_clock_utilization" RunStep="route_design" ReportFile="nexys_a7_top_clock_utilization_routed_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
        <ReportConfig DisplayName="Bus Skew - Route Design" Name="impl_1_copy_3_route_report_bus_skew_0" Spec="report_bus_skew" RunStep="route_design" ReportFile="nexys_a7_top_bus_skew_routed_1.rpt" Version="1" Minor="1">
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Timing Summary - Post-Route Phys Opt Design" Name="impl_1_copy_3_post_route_phys_opt_report_timing_summary_0" Spec="report_timing_summary" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_timing_summary_postroute_physopted_1.rpt" Version="1" Minor="0">
          <ReportConfigOption Name="max_paths" Type="" Value="10"/>
          <ReportConfigOption Name="report_unconstrained" Type="" Value="true"/>
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="Bus Skew - Post-Route Phys Opt Design" Name="impl_1_copy_3_post_route_phys_opt_report_bus_skew_0" Spec="report_bus_skew" RunStep="post_route_phys_opt_design" ReportFile="nexys_a7_top_bus_skew_postroute_physopted_1.rpt" Version="1" Minor="1">
          <ReportConfigOption Name="warn_on_violation" Type="" Value="true"/>
          <ReportConfigOutputOption Name="pb" Type="string" Value=""/>
          <ReportConfigOutputOption Name="rpx" Type="string" Value=""/>
        </ReportConfig>
        <ReportConfig DisplayName="implementation_log" Name="impl_1_copy_3_bitstream_implementation_log_0" Spec="" RunStep="write_bitstream" ReportFile="nexys_a7_top.vdi">
          <ReportConfigOption Name="dummy_option" Type="string"/>
        </ReportConfig>
      </ReportStrategy>
      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
      <RQSFiles/>
    </Run>
  </Runs>
  <Board/>
  <DashboardSummary Version="1" Minor="0">
    <Dashboards>
      <Dashboard Name="default_dashboard">
        <Gadgets>
          <Gadget Name="drc_1" Type="drc" Version="1" Row="2" Column="0">
            <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_drc_0 "/>
          </Gadget>
          <Gadget Name="methodology_1" Type="methodology" Version="1" Row="2" Column="1">
            <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_methodology_0 "/>
          </Gadget>
          <Gadget Name="power_1" Type="power" Version="1" Row="1" Column="0">
            <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_power_0 "/>
          </Gadget>
          <Gadget Name="timing_1" Type="timing" Version="1" Row="0" Column="1">
            <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_timing_summary_0 "/>
          </Gadget>
          <Gadget Name="utilization_1" Type="utilization" Version="1" Row="0" Column="0">
            <GadgetParam Name="REPORTS" Type="string_list" Value="synth_1#synth_1_synth_report_utilization_0 "/>
            <GadgetParam Name="RUN.STEP" Type="string" Value="synth_design"/>
            <GadgetParam Name="RUN.TYPE" Type="string" Value="synthesis"/>
          </Gadget>
          <Gadget Name="utilization_2" Type="utilization" Version="1" Row="1" Column="1">
            <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_place_report_utilization_0 "/>
          </Gadget>
        </Gadgets>
      </Dashboard>
      <CurrentDashboard>default_dashboard</CurrentDashboard>
    </Dashboards>
  </DashboardSummary>
</Project>
